src/drivers: Drop unneeded empty lines
Change-Id: I202e5d285612b9bf237b588ea3c006187623fdc3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44609 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
parent
490546f191
commit
d161a2fafd
46 changed files with 0 additions and 75 deletions
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@ -1,6 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <AGESA.h>
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#include <amdlib.h>
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@ -737,7 +737,6 @@ static int anx7625_power_on_init(uint8_t bus)
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}
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ANXINFO("Init interface.\n");
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anx7625_disable_pd_protocol(bus);
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anx7625_reg_read(bus, RX_P0_ADDR, OCM_FW_VERSION, &version);
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anx7625_reg_read(bus, RX_P0_ADDR, OCM_FW_REVERSION, &revision);
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@ -331,7 +331,6 @@ static bool ast_init_dvo(struct drm_device *dev)
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return true;
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}
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static void ast_init_analog(struct drm_device *dev)
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{
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struct ast_private *ast = dev->dev_private;
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@ -11,7 +11,6 @@
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#define PCI_CHIP_AST2100 0x2010
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#define PCI_CHIP_AST1180 0x1180
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enum ast_chip {
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AST2000,
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AST2100,
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@ -6,7 +6,6 @@
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#include "ast_drv.h"
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#include "ast_tables.h"
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static inline void ast_load_palette_index(struct ast_private *ast,
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u8 index, u8 red, u8 green,
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u8 blue)
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@ -25,7 +25,6 @@ void ast_enable_mmio(struct drm_device *dev)
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
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}
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bool ast_is_vga_enabled(struct drm_device *dev)
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{
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struct ast_private *ast = dev->dev_private;
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@ -208,7 +207,6 @@ static int cbrscan_ast2150(struct ast_private *ast, int busw)
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return 1;
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}
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static void cbrdlli_ast2150(struct ast_private *ast, int busw)
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{
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u32 dll_min[4], dll_max[4], dlli, data, passcnt;
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@ -239,8 +237,6 @@ cbr_start:
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ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24));
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}
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static void ast_init_dram_reg(struct drm_device *dev)
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{
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struct ast_private *ast = dev->dev_private;
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@ -479,7 +475,6 @@ static u32 mmc_test2(struct ast_private *ast, u32 datagen, u8 test_ctl)
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return data;
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}
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static bool mmc_test_burst(struct ast_private *ast, u32 datagen)
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{
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return mmc_test(ast, datagen, 0xc1);
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@ -1231,7 +1226,6 @@ ddr3_init_start:
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ast_moutdwm(ast, 0x1E6E0050, 0x00000000);
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#endif
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}
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static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *param)
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@ -1246,7 +1240,6 @@ static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *pa
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trap_AC2 += 0x00110000;
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trap_MRS = 0x00000040 | (trap << 4);
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param->reg_MADJ = 0x00034C4C;
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param->reg_SADJ = 0x00001800;
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param->reg_DRV = 0x000000F0;
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@ -220,7 +220,6 @@ static const struct ast_vbios_enhtable res_800x600[] = {
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(SyncPP | Charx8Dot), 0xFF, 5, 0x30 },
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};
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static const struct ast_vbios_enhtable res_1024x768[] = {
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{1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65, /* 60Hz */
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(SyncNN | Charx8Dot), 60, 1, 0x31 },
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@ -280,7 +279,6 @@ static const struct ast_vbios_enhtable res_1920x1080[] = {
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AST2500PreCatchCRT), 0xFF, 1, 0x38 },
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};
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/* 16:10 */
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static const struct ast_vbios_enhtable res_1280x800[] = {
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{1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */
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@ -30,7 +30,6 @@ static const char *tis_get_dev_name(struct tpm2_info *info)
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return "Unknown";
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}
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int tis_open(void)
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{
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if (tpm_is_open) {
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@ -79,7 +78,6 @@ int tis_init(void)
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return 0;
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}
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int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, uint8_t *recvbuf, size_t *rbuf_len)
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{
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int len = tpm2_process_command(sendbuf, sbuf_size, recvbuf, *rbuf_len);
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@ -121,7 +121,6 @@ static uint8_t crb_activate_locality(void)
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if (rc)
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write8(CRB_REG(locality, CRB_REG_LOC_CTRL), LOC_CTRL_REQ_ACCESS);
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rc = crb_wait_for_reg32(CRB_REG(locality, CRB_REG_LOC_STATE), 750, LOC_STATE_LOC_ASSIGN,
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LOC_STATE_LOC_ASSIGN);
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if (rc) {
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@ -137,7 +136,6 @@ static uint8_t crb_activate_locality(void)
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return 0;
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}
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return locality;
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}
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@ -176,7 +174,6 @@ static int crb_switch_to_ready(void)
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int tpm2_init(void)
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{
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if (crb_probe()) {
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printk(BIOS_ERR, "TPM: Probe failed.\n");
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return -1;
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@ -39,7 +39,6 @@
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#define CRB_INTF_REG_INTF_SEL (1<<17)
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#define CRB_INTF_REG_INTF_LOCK (1<<19)
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/*REQUEST Register related */
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#define CRB_REG_REQUEST_CMD_RDY 0x01
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#define CRB_REG_REQUEST_GO_IDLE 0x02
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@ -58,7 +57,6 @@ struct tpm2_info {
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uint16_t revision;
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};
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int tpm2_init(void);
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void tpm2_get_info(struct tpm2_info *tpm2_info);
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size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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@ -17,7 +17,6 @@
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#include <elog.h>
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#include "elog_internal.h"
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#if CONFIG(ELOG_DEBUG)
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#define elog_debug(STR...) printk(BIOS_DEBUG, STR)
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#else
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@ -299,7 +299,6 @@ static void cirrus_init_linear_fb(struct device *dev)
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vga_sr_write (CIRRUS_SR_EXTENDED_MODE, sr_ext);
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write_hidden_dac (hidden_dac);
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struct edid edid;
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edid.mode.ha = width;
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edid.mode.va = height;
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@ -5,7 +5,6 @@
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#include <smbios.h>
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#include <string.h>
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#define MAX_SERIAL_LENGTH 0x100
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const char *smbios_mainboard_serial_number(void)
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@ -113,7 +113,6 @@ void smbios_system_set_uuid(u8 *uuid)
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3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11, 12, 13, 14, 15
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};
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if (already_read) {
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memcpy(uuid, result, 16);
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return;
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@ -31,7 +31,6 @@ static void ck505_init(struct device *dev)
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nregs = MIN(MIN(dev_nregs, config->nregs == 0 ? SMBUS_BLOCK_SIZE
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: config->nregs), ARRAY_SIZE(config->mask));
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printk(BIOS_DEBUG, "Changing %d of the %d ck505 config bytes.\n",
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nregs, dev_nregs);
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@ -698,7 +698,6 @@ static int dw_i2c_set_speed(unsigned int bus, enum i2c_speed speed,
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return 0;
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}
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/*
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* Initialize this bus controller and set the speed.
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*
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@ -1,6 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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struct drivers_i2c_pca9538_config {
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unsigned char in_out; /* Use bit as input(1) or output (0). */
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unsigned char invert; /* If a bit is 1, the input will be inverted. */
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@ -1,6 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/i2c_bus.h>
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#include <types.h>
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@ -4,7 +4,6 @@
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* Realtek RT1011 audio codec devicetree bindings
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*/
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struct drivers_i2c_rt1011_config {
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const char *name; /* ACPI Device Name */
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const char *desc; /* Device Description */
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@ -15,7 +15,6 @@
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* Version: 2.1.1
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*/
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#include <commonlib/endian.h>
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#include <string.h>
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#include <types.h>
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@ -365,7 +365,6 @@ int ww_ring_display_pattern(unsigned int i2c_bus, enum display_pattern pattern)
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return -1;
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}
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#define LP55231_I2C_BASE_ADDR 0x32
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static void ww_ring_init(unsigned int i2c_bus)
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@ -174,7 +174,6 @@ struct fsp_runtime {
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uint32_t hob_list;
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} __packed;
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void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list)
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{
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struct fsp_runtime *fspr;
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@ -85,7 +85,6 @@ void *get_first_hob(uint16_t type);
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void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start);
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void *get_first_guid_hob(const EFI_GUID *guid);
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asmlinkage void chipset_teardown_car_main(void);
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#endif /* FSP1_1_UTIL_H */
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@ -31,7 +31,6 @@ enum fsp_notify_phase {
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END_OF_FIRMWARE = 0xF0
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};
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/* Main FSP stages */
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void fsp_memory_init(bool s3wake);
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void fsp_silicon_init(bool s3wake);
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@ -31,7 +31,6 @@
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#include <FirmwareVersionInfoHob.h>
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#endif
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#pragma pack(pop)
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#endif
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@ -27,7 +27,6 @@
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#define IVB_GMCH_GMS_SHIFT 4
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#define IVB_GMCH_GMS_MASK 0xf
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/* PCI config space */
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#define HPLLCC 0xc0 /* 855 only */
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@ -296,7 +295,6 @@
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#define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1<<0)
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#define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */
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/*
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* Reset registers
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*/
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@ -791,7 +789,6 @@
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#define ILK_FBCQ_DIS (1<<22)
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#define ILK_PABSTRETCH_DIS (1<<21)
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/*
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* Framebuffer compression for Sandybridge
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*
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@ -801,7 +798,6 @@
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#define SNB_CPU_FENCE_ENABLE (1<<29)
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#define DPFC_CPU_FENCE_OFFSET 0x100104
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/*
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* GPIO regs
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*/
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@ -1213,7 +1209,6 @@
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HSW_CXT_RENDER_SIZE(ctx_reg) + \
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GEN7_CXT_VFSTATE_SIZE(ctx_reg))
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/*
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* Overlay regs
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*/
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@ -1254,7 +1249,6 @@
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#define _BCLRPAT_B 0x61020
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#define _VSYNCSHIFT_B 0x61028
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#define HTOTAL(trans) _TRANSCODER(trans, _HTOTAL_A, _HTOTAL_B)
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#define HBLANK(trans) _TRANSCODER(trans, _HBLANK_A, _HBLANK_B)
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#define HSYNC(trans) _TRANSCODER(trans, _HSYNC_A, _HSYNC_B)
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@ -1311,7 +1305,6 @@
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#define ADPA_DPMS_STANDBY (2<<10)
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#define ADPA_DPMS_OFF (3<<10)
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/* Hotplug control (945+ only) */
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#define PORT_HOTPLUG_EN 0x61110
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#define HDMIB_HOTPLUG_INT_EN (1 << 29)
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@ -2808,7 +2801,6 @@
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#define _PIPEB_FRMCOUNT_GM45 0x71040
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#define _PIPEB_FLIPCOUNT_GM45 0x71044
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/* Display B control */
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#define _DSPBCNTR 0x71180
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#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15)
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@ -3011,7 +3003,6 @@
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#define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00
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#define FDI_PLL_FREQ_DISABLE_COUNT_LIMIT_MASK 0xff
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#define _PIPEA_DATA_M1 0x60030
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#define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */
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#define TU_SIZE_MASK 0x7e000000
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@ -3565,7 +3556,6 @@
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#define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
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#define TRANS_CHICKEN2_TIMING_OVERRIDE (1UL<<31)
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#define SOUTH_CHICKEN1 0xc2000
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#define FDIA_PHASE_SYNC_SHIFT_OVR 19
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#define FDIA_PHASE_SYNC_SHIFT_EN 18
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@ -98,7 +98,6 @@ int intel_vga_int15_handler(void)
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return res;
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}
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void install_intel_vga_int15_handler(int active_lfp_, int pfit_, int display_, int panel_type_)
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{
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active_lfp = active_lfp_;
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@ -27,7 +27,6 @@ enum {
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GMA_INT15_ACTIVE_LFP_EDP = 0x03,
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};
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#if CONFIG(VGA_ROM_RUN)
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/* Install custom int15 handler for VGA OPROM */
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void install_intel_vga_int15_handler(int active_lfp, int pfit, int display, int panel_type);
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@ -396,7 +396,6 @@ struct bdb_sdvo_lvds_options {
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u8 panel_misc_bits_4;
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} __packed;
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#define BDB_DRIVER_FEATURE_NO_LVDS 0
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#define BDB_DRIVER_FEATURE_INT_LVDS 1
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#define BDB_DRIVER_FEATURE_SDVO_LVDS 2
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@ -16,7 +16,6 @@
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#define I210_DONE 0x02 /* command done bit */
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#define I210_TARGET_CHECKSUM 0xBABA /* resulting checksum */
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/*define some other useful values here */
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#define I210_POLL_TIMEOUT_US 300000 /* 300 ms */
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/*Define some error states here*/
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@ -53,7 +53,6 @@ static int wait_obf_timeout(int port)
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}
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}
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static int ipmi_kcs_send_data_byte(int port, const unsigned char byte)
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{
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unsigned char status;
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|
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|
@ -36,7 +36,6 @@ SMC8416 PIO support added by Andrew Bettison (andrewb@zip.com.au) on 4/3/02
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#include "ns8390.h"
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#define ETH_ALEN 6 /* Size of Ethernet address */
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#define ETH_HLEN 14 /* Size of ethernet header */
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#define ETH_ZLEN 60 /* Minimum packet */
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|
@ -48,7 +47,6 @@ SMC8416 PIO support added by Andrew Bettison (andrewb@zip.com.au) on 4/3/02
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#define TX_START 64
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#define RX_START (64 + D8390_TXBUF_SIZE)
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static unsigned int get_count(unsigned int eth_nic_base)
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{
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unsigned int ret;
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@ -146,7 +144,6 @@ static void str2mac(const char *str, unsigned char *mac)
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} while (c != '\0');
|
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}
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static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen)
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{
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unsigned short chksum;
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|
|
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@ -77,7 +77,6 @@ unsigned long calibrate_tsc_with_pit(void)
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if (end.hi)
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goto bad_ctc;
|
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/* Error: ECPUTOOSLOW */
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if (end.lo <= CALIBRATE_DIVISOR)
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goto bad_ctc;
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@ -32,7 +32,6 @@
|
|||
|
||||
#define DMA_AUTOINIT 0x10
|
||||
|
||||
|
||||
void isa_dma_init(void)
|
||||
{
|
||||
/* slave at 0x00 - 0x0f */
|
||||
|
|
|
@ -5,7 +5,6 @@
|
|||
|
||||
#define SPEAKER_PIT_FREQUENCY 0x1234dd
|
||||
|
||||
|
||||
enum {
|
||||
PIT_COUNTER_0 = 0x40,
|
||||
PIT_COUNTER_1 = 0x41,
|
||||
|
@ -14,7 +13,6 @@ enum {
|
|||
PIT_SPEAKER_PORT = 0x61,
|
||||
};
|
||||
|
||||
|
||||
enum {
|
||||
PIT_SPK_TMR2 = 0x01,
|
||||
PIT_SPK_DATA = 0x02,
|
||||
|
@ -44,13 +42,11 @@ enum {
|
|||
|
||||
PIT_CTRL_HARDSTROBE = 0x0a,
|
||||
|
||||
|
||||
PIT_CTRL_COUNT_MASK = 0x01,
|
||||
PIT_CTRL_COUNT_BINARY = 0x00,
|
||||
PIT_CTRL_COUNT_BCD = 0x01
|
||||
};
|
||||
|
||||
|
||||
static void
|
||||
make_tone(uint16_t freq_count, unsigned int duration)
|
||||
{
|
||||
|
|
|
@ -228,7 +228,6 @@ int cmos_lb_cks_valid(void)
|
|||
return cmos_checksum_valid(LB_CKS_RANGE_START, LB_CKS_RANGE_END, LB_CKS_LOC);
|
||||
}
|
||||
|
||||
|
||||
void sanitize_cmos(void)
|
||||
{
|
||||
const unsigned char *cmos_default;
|
||||
|
|
|
@ -373,7 +373,6 @@ static const struct spi_flash_part_id *find_part(const struct spi_flash_vendor_i
|
|||
[1] = id[1] & vi->match_id_mask[1],
|
||||
};
|
||||
|
||||
|
||||
for (i = 0; i < vi->nr_part_ids; i++) {
|
||||
const struct spi_flash_part_id *part = &vi->ids[i];
|
||||
|
||||
|
@ -666,7 +665,6 @@ void lb_spi_flash(struct lb_header *header)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
int spi_flash_ctrlr_protect_region(const struct spi_flash *flash,
|
||||
const struct region *region,
|
||||
const enum ctrlr_prot_type type)
|
||||
|
|
|
@ -358,7 +358,6 @@ static int spi_sdcard_do_app_command(const struct spi_sdcard *card,
|
|||
return spi_sdcard_do_command_help(card, 1, cmd, argument, out_register);
|
||||
}
|
||||
|
||||
|
||||
size_t spi_sdcard_size(const struct spi_sdcard *card)
|
||||
{
|
||||
int wait;
|
||||
|
|
|
@ -75,7 +75,6 @@ int tis_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size,
|
||||
uint8_t *recvbuf, size_t *rbuf_len)
|
||||
{
|
||||
|
|
|
@ -32,7 +32,6 @@ struct cr50_firmware_version {
|
|||
*/
|
||||
int tpm2_init(struct spi_slave *spi_if);
|
||||
|
||||
|
||||
/*
|
||||
* Each command processing consists of sending the command to the TPM, by
|
||||
* writing it into the FIFO register, then polling the status register until
|
||||
|
|
|
@ -26,7 +26,6 @@ static void oxford_oxpcie_enable(struct device *dev)
|
|||
printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base);
|
||||
}
|
||||
|
||||
|
||||
static void oxford_oxpcie_set_resources(struct device *dev)
|
||||
{
|
||||
pci_dev_set_resources(dev);
|
||||
|
|
|
@ -40,7 +40,6 @@ struct ehci_caps {
|
|||
u8 portroute[8]; /* nibbles for routing - offset 0xC */
|
||||
} __packed;
|
||||
|
||||
|
||||
/* Section 2.3 Host Controller Operational Registers */
|
||||
struct ehci_regs {
|
||||
|
||||
|
|
|
@ -421,8 +421,6 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
|
|||
return -1; //-ENOTCONN;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static int usbdebug_init_(uintptr_t ehci_bar, unsigned int offset, struct ehci_debug_info *info)
|
||||
{
|
||||
struct ehci_caps *ehci_caps;
|
||||
|
@ -549,7 +547,6 @@ try_next_port:
|
|||
}
|
||||
dprintk(BIOS_INFO, "EHCI done waiting for port.\n");
|
||||
|
||||
|
||||
/* Enable the debug port */
|
||||
ctrl = read32(&ehci_debug->control);
|
||||
ctrl |= DBGP_CLAIM;
|
||||
|
|
|
@ -17,7 +17,6 @@
|
|||
#define USB_HUB_C_PORT_CONNECTION 16
|
||||
#define USB_HUB_C_PORT_RESET 20
|
||||
|
||||
|
||||
static int hub_port_status(const char *buf, int feature)
|
||||
{
|
||||
return !!(buf[feature>>3] & (1<<(feature&0x7)));
|
||||
|
@ -73,7 +72,6 @@ static int dbgp_hub_enable(struct ehci_dbg_port *ehci_debug, unsigned char hub_a
|
|||
if (ret < 0)
|
||||
goto err;
|
||||
|
||||
|
||||
/* Set PORT_RESET, poll for C_PORT_RESET. */
|
||||
ret = dbgp_control_msg(ehci_debug, hub_addr,
|
||||
USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER,
|
||||
|
|
|
@ -24,7 +24,6 @@ __weak enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
|
|||
return CB_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
static void xhci_count_ports(void *context, const struct xhci_supported_protocol *data)
|
||||
{
|
||||
struct port_counts *counts = context;
|
||||
|
|
|
@ -105,7 +105,6 @@ static void emit_sar_acpi_structures(void)
|
|||
acpigen_pop_len();
|
||||
acpigen_pop_len();
|
||||
|
||||
|
||||
if (!CONFIG(GEO_SAR_ENABLE))
|
||||
return;
|
||||
|
||||
|
|
Loading…
Reference in a new issue