diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
index c84de40031..a9800a5130 100644
--- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld
+++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
@@ -36,9 +36,9 @@ SECTIONS
 	 * and then through the identity mapping in ROM stage.
 	 */
 	SRAM_START(0x1a000000)
-	ROMSTAGE(0x1a005000, 40K)
-	VBOOT2_WORK(0x1a00f000, 12K)
-	PRERAM_CBFS_CACHE(0x1a012000, 56K)
+	ROMSTAGE(0x1a005000, 60K)
+	VBOOT2_WORK(0x1a014000, 12K)
+	PRERAM_CBFS_CACHE(0x1a017000, 56K)
 	SRAM_END(0x1a066000)
 
 	/* Bootblock executes out of KSEG0 and sets up the identity mapping.
diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout.ld b/src/soc/nvidia/tegra132/include/soc/memlayout.ld
index e3d221ea75..a8f8a34299 100644
--- a/src/soc/nvidia/tegra132/include/soc/memlayout.ld
+++ b/src/soc/nvidia/tegra132/include/soc/memlayout.ld
@@ -29,17 +29,17 @@ SECTIONS
 {
 	SRAM_START(0x40000000)
 	PRERAM_CBMEM_CONSOLE(0x40000000, 8K)
-	PRERAM_CBFS_CACHE(0x40002000, 72K)
-	VBOOT2_WORK(0x40014000, 12K)
+	PRERAM_CBFS_CACHE(0x40002000, 36K)
+	VBOOT2_WORK(0x4000B000, 12K)
 #if ENV_ARM64
-	STACK(0x40017000, 3K)
+	STACK(0x4000E000, 3K)
 #else	/* AVP gets a separate stack to avoid any chance of handoff races. */
-	STACK(0x40017C00, 3K)
+	STACK(0x4000EC00, 3K)
 #endif
-	TIMESTAMP(0x40018800, 2K)
-	BOOTBLOCK(0x40019000, 22K)
-	VERSTAGE(0x4001e800, 55K)
-	ROMSTAGE(0x4002c400, 77K)
+	TIMESTAMP(0x4000F800, 2K)
+	BOOTBLOCK(0x40010000, 28K)
+	VERSTAGE(0x40017000, 64K)
+	ROMSTAGE(0x40027000, 100K)
 	SRAM_END(0x40040000)
 
 	DRAM_START(0x80000000)