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mb/google/zork: Drop GPIO_27 configuration for trembyle reference 

This change drops GPIO_27 configuration for trembyle reference boards
since it is unused.

BUG=b:159453643

Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I57dd78e8abcc61802ca85158e7ff348460ad1d8e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2020-06-29 20:11:58 -07:00
parent 70b7fa1434
commit d1998a5f14
1 changed files with 0 additions and 6 deletions
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6
src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
View File

@ -14,8 +14,6 @@ static const struct soc_amd_gpio gpio_set_stage_rom_pre_v3[] = {
PAD_GPO(GPIO_5, LOW), PAD_GPO(GPIO_5, LOW),
/* EC_FCH_WAKE_L */ /* EC_FCH_WAKE_L */
PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5), PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5),
/* PCIE_RST1_L - Variable timings (May remove) */
PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
/* NVME_AUX_RESET_L */ /* NVME_AUX_RESET_L */
PAD_GPO(GPIO_40, HIGH), PAD_GPO(GPIO_40, HIGH),
/* EN_PWR_TOUCHPAD_PS2 - reset */ /* EN_PWR_TOUCHPAD_PS2 - reset */
@ -45,8 +43,6 @@ static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = {
PAD_GPO(GPIO_13, LOW), PAD_GPO(GPIO_13, LOW),
/* EC_FCH_WAKE_L */ /* EC_FCH_WAKE_L */
PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5), PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5),
/* PCIE_RST1_L - Variable timings (May remove) */
PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
/* NVME_AUX_RESET_L */ /* NVME_AUX_RESET_L */
PAD_GPO(GPIO_40, HIGH), PAD_GPO(GPIO_40, HIGH),
/* EMMC_RESET - reset (default stuffing unused)*/ /* EMMC_RESET - reset (default stuffing unused)*/
@ -307,8 +303,6 @@ __weak void variant_pcie_power_reset_configure(void)
static const struct soc_amd_gpio gpio_sleep_table[] = { static const struct soc_amd_gpio gpio_sleep_table[] = {
/* PEN_POWER_EN */ /* PEN_POWER_EN */
PAD_GPO(GPIO_5, LOW), PAD_GPO(GPIO_5, LOW),
/* PCIE_RST1_L */
PAD_GPO(GPIO_27, LOW),
/* NVME_AUX_RESET_L */ /* NVME_AUX_RESET_L */
PAD_GPO(GPIO_40, LOW), PAD_GPO(GPIO_40, LOW),
/* EN_PWR_CAMERA */ /* EN_PWR_CAMERA */