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mb/sapphire/pureplatinumh61/devicetree.cb: Drop zero values

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They default to zero already.

Change-Id: Ib888377f06d6fcb79cff5e30155971c17aa2597c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38061
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-01-01 18:41:42 +01:00 committed by Nico Huber
parent 0b707f6667
commit d1b80f0fc2
1 changed files with 0 additions and 17 deletions
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17
src/mainboard/sapphire/pureplatinumh61/devicetree.cb
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@ -16,20 +16,7 @@
chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx.link_frequency_270_mhz" = "0"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "0"
register "gpu_cpu_backlight" = "0x00000000"
register "gpu_dp_b_hotplug" = "0"
register "gpu_dp_c_hotplug" = "0"
register "gpu_dp_d_hotplug" = "0"
register "gpu_panel_port_select" = "0"
register "gpu_panel_power_backlight_off_delay" = "0"
register "gpu_panel_power_backlight_on_delay" = "0"
register "gpu_panel_power_cycle_delay" = "0"
register "gpu_panel_power_down_delay" = "0"
register "gpu_panel_power_up_delay" = "0"
register "gpu_pch_backlight" = "0x00000000"
device cpu_cluster 0x0 on
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
@ -45,12 +32,8 @@ chip northbridge/intel/sandybridge
device domain 0x0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
register "gen1_dec" = "0x000c0291"
register "gen2_dec" = "0x000c0a01"
register "gen3_dec" = "0x00000000"
register "gen4_dec" = "0x00000000"
register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x33"