- Update romcc so that it more successfully spills registers to the xmm registers

- Add several more test cases.
- Bump the version number to .32


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

util/romcc/Makefile

@@ -1,5 +1,5 @@
-VERSION:=0.31
+VERSION:=0.32
-RELEASE_DATE:=25 June 2003
+RELEASE_DATE:=28 June 2003
 PACKAGE:=romcc
 
 
@@ -59,18 +59,36 @@ TESTS=\
 	simple_test37.c \
 	simple_test38.c \
 	simple_test39.c \
+	simple_test40.c \
+	simple_test41.c \
+	simple_test42.c \
+	simple_test43.c \
+	simple_test44.c \
+	simple_test45.c \
+	simple_test46.c \
+	simple_test47.c \
 	raminit_test.c \
 	raminit_test2.c \
 	raminit_test3.c \
 	raminit_test4.c
 
+FAIL_TESTS = \
+	fail_test1.c
+
 TEST_SRCS:=$(patsubst %, tests/%, $(TESTS))
 TEST_ASM:=$(patsubst %.c, tests/%.S, $(TESTS))
 TEST_OBJ:=$(patsubst %.c, tests/%.o, $(TESTS))
 TEST_ELF:=$(patsubst %.c, tests/%.elf, $(TESTS))
 
+FAIL_SRCS:=$(patsubst %, tests/%, $(FAIL_TESTS))
+FAIL_OUT:=$(patsubst %.c, tests/%.out, $(FAIL_TESTS))
+
+
 $(TEST_ASM): %.S: %.c romcc
-	export ALLOC_CHECK_=2; ./romcc -O -o $@ $< > $*.debug
+	export ALLOC_CHECK_=2; ./romcc -mcpu=k8 -O -o $@ $< > $*.debug
+
+$(FAIL_OUT): %.out: %.c romcc
+	export ALLOC_CHECK_=2; if ./romcc -O -o $*.S $< > $*.debug 2> $@ ; then exit 1 ; else exit 0 ; fi
 
 $(TEST_OBJ): %.o: %.S
 	as $< -o $@
@@ -85,7 +103,10 @@ echo:
 	echo "TEST_ASM=$(TEST_ASM)"
 	echo "TEST_OBJ=$(TEST_OBJ)"
 	echo "TEST_ELF=$(TEST_ELF)"
+	echo ""
+	echo "FAIL_SRCS=$(FAIL_SRCS)"
+	echo "FAIL_ASM=$(FAIL_ASM)"
 
 clean:
-	rm -f romcc romcc_pg core $(TEST_ASM) $(TEST_OBJ) $(TEST_ELF) tests/*.debug tests/*.debug2 tests/*.gmon.out
+	rm -f romcc romcc_pg core $(TEST_ASM) $(TEST_OBJ) $(TEST_ELF) tests/*.debug tests/*.debug2 tests/*.gmon.out tests/*.out
 

util/romcc/tests/simple_test41.c

@@ -0,0 +1,14 @@
+static void main(void)
+{
+	unsigned long a,b,c, d;
+	volatile unsigned long *val = (volatile unsigned long *)0x1234;
+	a = val[0];
+	b = val[1];
+	c = a*b;
+	val[2] = c;
+	d = val[3];
+	a = c / d;
+	b = c % d;
+	val[4] = a;
+	val[5] = b;
+}

util/romcc/tests/simple_test43.c

@@ -0,0 +1,47 @@
+static void spd_set_memclk(void)
+{
+
+        unsigned min;
+        unsigned device;
+
+
+	min = 0x250;
+
+
+        for(device = 0x80; device <= 0x81; device += 1)
+        {
+                unsigned cur;
+                int latency;
+		unsigned long loops;
+
+		cur = 5 | 0xa0;
+		latency = __builtin_inw(0xab);
+
+                if (latency > 0x250) {
+			loops = 1000000;
+			while(--loops)
+				;
+			if (!loops) {
+				goto end;
+			}
+			
+			loops = 1000000;
+			while(--loops)
+				;
+		end:	
+			;
+			
+                }
+		loops = 1000000;
+		while(--loops)
+			;
+
+                if (latency > 0x250) {
+			;
+                }
+
+                if (cur > 0x250) {
+                }
+        }
+
+}

util/romcc/tests/simple_test45.c

@@ -0,0 +1,41 @@
+static void spd_set_memclk(void)
+{
+        unsigned min_cycle_time;
+        unsigned device;
+	int new_cycle_time, new_latency;
+	int index;
+	int latency;
+
+        min_cycle_time = 0x50;
+	device = 0x50;
+	new_cycle_time = 0xa0;
+	new_latency = 5;
+	
+	
+	latency = 0;
+	for(index = 0; index < 3; index++, latency++) {
+		unsigned long loops;
+		loops = 1000000;
+		do {
+			unsigned short val;
+			val = __builtin_inw(0x10e0);
+		} while(--loops);
+		if (!loops) {
+			continue;
+		}
+		
+		__builtin_outb(device, 0xe4);
+		__builtin_outb(index, 0xe8);
+		
+		loops = 1000000;
+		while(--loops)
+			;
+	}
+	if (new_latency > 4){
+		return;
+	}
+
+	if (new_cycle_time > min_cycle_time) {
+		min_cycle_time = new_cycle_time;
+	}
+}

util/romcc/tests/simple_test46.c

@@ -0,0 +1,41 @@
+static void spd_set_memclk(void)
+{
+	static const int indicies[] = { 26, 23, 9 };
+	int new_cycle_time, new_latency;
+	int index;
+	unsigned min_cycle_time, min_latency;
+	unsigned device;
+
+	min_cycle_time = 0x50;
+	min_latency = 2;
+	device = 0x50;
+	new_cycle_time = 0xa0;
+	new_latency = 5;
+
+	for(index = 0; index < 3; index++) {
+		unsigned long loops;
+		unsigned long address;
+		address = indicies[index];
+		loops = 1000000;
+		do {
+		} while(--loops);
+		if (loops < 0) {
+			continue;
+		}
+		
+		__builtin_outb(device, 0x10e4);
+		__builtin_outb(address, 0x10e8);
+		
+		loops = 1000000;
+		if ((loops?0:-1) < 0) {
+			continue;
+		}
+	}
+	
+	if (new_cycle_time > min_cycle_time) {
+		min_cycle_time = new_cycle_time;
+	}
+	if (new_latency > min_latency) {
+		min_latency = new_latency;
+	}
+}

util/romcc/tests/simple_test47.c

@@ -0,0 +1,43 @@
+static void spd_set_memclk(void)
+{
+	unsigned min_cycle_time, min_latency;
+	unsigned device;
+	int new_cycle_time, new_latency;
+	int index;
+	int latency;
+
+	min_cycle_time = 0x50;
+	min_latency = 2;
+	device = 0x50;
+	new_latency = 5;
+	new_cycle_time = 0xa0;
+	latency = 23;
+
+	for(index = 0; index < 3; index++, latency++) {
+		unsigned long loops;
+		unsigned address = index;
+		
+		loops = 1000000;
+		do {
+		} while(--loops);
+		if (loops) {
+			continue;
+		}
+		
+		__builtin_outb(device, 0x10e4);
+		
+		__builtin_outb(address & 0xFF, 0x10e8);
+		
+		loops = 1000000;
+		while(--loops)
+			;
+	}
+
+	if (new_cycle_time > min_cycle_time) {
+		min_cycle_time = new_cycle_time;
+	}
+	if (new_latency > min_latency) {
+		min_latency = new_latency;
+	}
+}
+