diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c
index a5113474d3..817d43e297 100644
--- a/src/cpu/amd/car/disable_cache_as_ram.c
+++ b/src/cpu/amd/car/disable_cache_as_ram.c
@@ -2,62 +2,49 @@
 /* be warned, this file will be used other cores and core 0 / node 0 */
 static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
 {
-
-        __asm__ volatile (
-
+        __asm__ __volatile__ (
         /* We don't need cache as ram for now on */
         /* disable cache */
-        "movl    %cr0, %eax\n\t"
-        "orl    $(0x1<<30),%eax\n\t"
-        "movl    %eax, %cr0\n\t"
+        "movl    %%cr0, %%eax\n\t"
+        "orl    $(0x1<<30),%%eax\n\t"
+        "movl    %%eax, %%cr0\n\t"
 
         /* clear sth */
-        "movl    $0x269, %ecx\n\t"  /* fix4k_c8000*/
-        "xorl    %edx, %edx\n\t"
-        "xorl    %eax, %eax\n\t"
+        "movl    $0x269, %%ecx\n\t"  /* fix4k_c8000*/
+        "xorl    %%edx, %%edx\n\t"
+        "xorl    %%eax, %%eax\n\t"
 	"wrmsr\n\t"
 #if CONFIG_DCACHE_RAM_SIZE > 0x8000
-	"movl    $0x268, %ecx\n\t"  /* fix4k_c0000*/
+	"movl    $0x268, %%ecx\n\t"  /* fix4k_c0000*/
         "wrmsr\n\t"
 #endif
 
         /* disable fixed mtrr from now on, it will be enabled by coreboot_ram again*/
-        "movl    $0xC0010010, %ecx\n\t"
+        "movl    $0xC0010010, %%ecx\n\t"
 //        "movl    $SYSCFG_MSR, %ecx\n\t"
         "rdmsr\n\t"
-        "andl    $(~(3<<18)), %eax\n\t"
+        "andl    $(~(3<<18)), %%eax\n\t"
 //        "andl    $(~(SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn)), %eax\n\t"
         "wrmsr\n\t"
 
         /* Set the default memory type and disable fixed and enable variable MTRRs */
-        "movl    $0x2ff, %ecx\n\t"
+        "movl    $0x2ff, %%ecx\n\t"
 //        "movl    $MTRRdefType_MSR, %ecx\n\t"
-        "xorl    %edx, %edx\n\t"
+        "xorl    %%edx, %%edx\n\t"
         /* Enable Variable and Disable Fixed MTRRs */
-        "movl    $0x00000800, %eax\n\t"
+        "movl    $0x00000800, %%eax\n\t"
         "wrmsr\n\t"
 
         /* enable cache */
-        "movl    %cr0, %eax\n\t"
-        "andl    $0x9fffffff,%eax\n\t"
-        "movl    %eax, %cr0\n\t"
-
+        "movl    %%cr0, %%eax\n\t"
+        "andl    $0x9fffffff,%%eax\n\t"
+        "movl    %%eax, %%cr0\n\t"
+        ::: "memory", "eax", "ecx", "edx"
         );
 }
 
 static void disable_cache_as_ram_bsp(void)
 {
-	__asm__ volatile (
-//		"pushl %eax\n\t"
- 		"pushl %edx\n\t"
- 		"pushl %ecx\n\t"
-	);
-
 	disable_cache_as_ram();
-        __asm__ volatile (
-                "popl %ecx\n\t"
-                "popl %edx\n\t"
-//                "popl %eax\n\t"
-        );
 }
 
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 5b3737123a..5c085cd6d8 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -10,14 +10,20 @@ static inline void print_debug_pcar(const char *strval, uint32_t val)
         printk_debug("%s%08x\r\n", strval, val);
 }
 
+/* from linux kernel 2.6.32 asm/string_32.h */
+
 static void inline __attribute__((always_inline))  memcopy(void *dest, const void *src, unsigned long bytes)
 {
-        __asm__ volatile(
-                "cld\n\t"
-                "rep; movsl\n\t"
-                : /* No outputs */
-                : "S" (src), "D" (dest), "c" ((bytes)>>2)
-                );
+	int d0, d1, d2;
+	asm volatile("cld ; rep ; movsl\n\t"
+			"movl %4,%%ecx\n\t"
+			"andl $3,%%ecx\n\t"
+			"jz 1f\n\t"
+			"rep ; movsb\n\t"
+			"1:"
+			: "=&c" (d0), "=&D" (d1), "=&S" (d2)
+			: "0" (bytes / 4), "g" (bytes), "1" ((long)dest), "2" ((long)src)
+			: "memory", "cc");
 }
 /* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33 */
 
@@ -66,27 +72,17 @@ static void post_cache_as_ram(void)
 	/* from here don't store more data in CAR */
 	vErrata343();
 
-#if 0
-        __asm__ volatile (
-        	"pushl  %eax\n\t"
-        );
-#endif
-
         memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline
 //        dump_mem((CONFIG_RAMTOP) - 0x8000, (CONFIG_RAMTOP) - 0x7c00);
 
         __asm__ volatile (
                 /* set new esp */ /* before CONFIG_RAMBASE */
-                "subl   %0, %%ebp\n\t"
                 "subl   %0, %%esp\n\t"
                 ::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )
-        ); // We need to push %eax to the stack (CAR) before copy stack and pop it later after copy stack and change esp
-#if 0
-        __asm__ volatile (
-	        "popl   %eax\n\t"
+		/* discard all registers (eax is used for %0), so gcc redo everything
+		   after the stack is moved */
+		: "cc", "memory", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp"
         );
-#endif
-
 
 	/* We can put data to stack again */