Revert "soc/mediatek/mt8188: Allow CPUfreq hardware to access MCUPM registers"
This reverts commit a8172c329f
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In the aforementioned patch, we allowed MCUPM to access secure
registers and set the domain to DOMAIN_2.
Additional attribute settings are also required when a hardware is
set to a specific domain. Otherwise, there would be violation between
hardware. Since MT8188 is in bring-up stage, we simply enable access
register permission for the DOMAIN_0 by default. So remove the wrong
setting for MCUPM, SCP and SSPM.
We will complete DEVAPC setting when the settings are confirmed.
Change-Id: I5d9809f6e84b8d10bc2e6f2ea5a442e676ad3bf9
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69139
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
parent
bcb610a559
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@ -1550,12 +1550,6 @@ static void dump_peri_par_ao_apc(uintptr_t base)
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static void infra_init(uintptr_t base)
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{
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/* Side band */
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SET32_BITFIELDS(getreg(base, MAS_SEC_0), MCUPM_SEC, SECURE_TRANS);
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/* Master domain */
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SET32_BITFIELDS(getreg(base, MAS_DOM_0), SCP_SSPM_DOM, DOMAIN_2, MCUPM_DOM, DOMAIN_2);
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/* Default APC setting */
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set_infra_ao_apc(base);
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}
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@ -17,10 +17,6 @@ enum devapc_ao_offset {
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AO_APC_CON = 0x00F00,
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};
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DEFINE_BIT(MCUPM_SEC, 1)
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DEFINE_BITFIELD(MCUPM_DOM, 11, 8)
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DEFINE_BITFIELD(SCP_SSPM_DOM, 19, 16)
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/******************************************************************************
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* STRUCTURE DEFINITION
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******************************************************************************/
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