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mb/google/hatch: Enable audio support 

Following changes are done to enable audio support on hatch
1. Enable I2C4 device at 400Khz at 1.8V
2. Configure GPIO for HP INT and SPKR_PA_EN
3. Add ACPI entry for RT5682 and MAX98357A
4. Enable I2S0 and I2S1 lines
5. Enable generic max98357a driver in Kconfig

BUG=b:123738217
BRANCH=none
TEST=Check SSDT table for RT5682 & MAX98357a entry.
     Verify audio using Sound Open firmware (SOF)

Change-Id: I93f3917c19cc3f0f8fd7b5e1b4d9b24a59f45f84
Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31280
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Sathya Prakash M R 2019-02-04 17:26:45 +05:30 committed by Furquan Shaikh
parent 8d8ceade60
commit d244f6ca46
3 changed files with 34 additions and 4 deletions
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1
src/mainboard/google/hatch/Kconfig
View File

@ -2,6 +2,7 @@
config BOARD_GOOGLE_BASEBOARD_HATCH
def_bool n
select BOARD_ROMSIZE_KB_32768
select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_SPI_ACPI

33
src/mainboard/google/hatch/variants/baseboard/devicetree.cb
View File

@ -27,6 +27,7 @@ chip soc/intel/cannonlake
#| | before memory is up |
#| I2C0 | Touchpad |
#| I2C1 | Touch screen |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.gspi[0] = {
@ -39,6 +40,9 @@ chip soc/intel/cannonlake
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
}"
# FSP configuration
@ -97,6 +101,12 @@ chip soc/intel/cannonlake
register "PcieClkSrcUsage[3]" = "13"
register "PcieClkSrcClkReq[3]" = "3"
#Enable I2S Audio, SSP0, SSP1 and DMIC0
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkSsp0" = "1"
register "PchHdaAudioLinkSsp1" = "1"
register "PchHdaAudioLinkDmic0" = "1"
device cpu_cluster 0 on
device lapic 0 on end
end
@ -229,7 +239,20 @@ chip soc/intel/cannonlake
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on end # SATA
device pci 19.0 on end # I2C #4
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Realtek RT5682""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)"
register "property_count" = "1"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on end
end
end #I2C #4
device pci 19.1 off end # I2C #5
device pci 19.2 off end # UART #2
device pci 1a.0 off end # eMMC
@ -270,7 +293,13 @@ chip soc/intel/cannonlake
end # eSPI Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.3 off end # Intel HDA
device pci 1f.3 on
chip drivers/generic/max98357a
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H3)"
register "sdmode_delay" = "5"
device generic 0 on end
end
end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE

4
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -343,7 +343,7 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_G7, DN_20K),
/*
* H0 : AUDIO IRQ
* H0 : HP_INT_L
* TODO Configure it back to invert mode, when
* ITSS IPCx configuration is fixed in FSP.
*/
@ -352,7 +352,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
/* H2 : CNV_CLKREQ0 */
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
/* H3 : SPEAKER SD MODE ENABLE */
/* H3 : SPKR_PA_EN */
PAD_CFG_GPO(GPP_H3, 0, DEEP),
/* H4 : PCH_I2C_PEN_SDA */
PAD_NC(GPP_H4, NONE),