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tree: Replace And(a,b) with ASL 2.0 syntax 

Replace `And (a, b)` with `a & b`.

Change-Id: Id8bbd1a477e6286bbcb5fa31afd1c7a860b1c7dc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70851
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2022-12-16 07:54:16 +01:00
parent 35e65a8bc3
commit d252776668
13 changed files with 56 additions and 56 deletions
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4
src/drivers/intel/gma/acpi/configure_brightness_levels.asl
View File

@ -46,7 +46,7 @@
{
Return (Ones)
}
If (And(MBOX, 0x4) == 0)
If (MBOX & 4 == 0)
{
Return (Ones)
}
@ -74,7 +74,7 @@
While (Local0 > 0)
{
Sleep (1)
If (And (ASLC, 0x2) == 0) {
If (ASLC & 2 == 0) {
/* Request has been processed, check status: */
Local1 = (ASLC >> 12) & 3
If (Local1 == 0) {

2
src/drivers/intel/gma/acpi/gma.asl
View File

@ -13,7 +13,7 @@ Scope (GFX0)
ASLS, 32,
}
OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
OperationRegion (GFRG, SystemMemory, BAR0 & 0xfffffffffffffff0, 0x400000)
Field (GFRG, DWordAcc, NoLock, Preserve)
{
Offset (CONFIG_INTEL_GMA_BCLV_OFFSET),

2
src/ec/google/chromeec/acpi/battery.asl
View File

@ -44,7 +44,7 @@ Method (BSTA, 1, Serialized)
Return (Zero)
}
If (And(Not(BTSW (Arg0)), BTEX)) {
If (Not(BTSW (Arg0)) & BTEX) {
Local0 = 0x1F
} Else {
Local0 = 0x0F

8
src/ec/kontron/it8516e/acpi/pm_channels.asl
View File

@ -32,7 +32,7 @@ Device (PM1) {
Method (CTK)
{
Local0 = EC_READ (0x52)
If (And (Local0, EC_ERROR_MASK)) {
If (Local0 & EC_ERROR_MASK) {
Return (0)
}
Local0 *= 10
@ -74,17 +74,17 @@ Device (PM2) {
{
Acquire (EC_MUTEX, 0xffff)
Local0 = SEND_EC_COMMAND (0x20) /* GET_CPUTEMP */
If (And (Local0, EC_ERROR_MASK)) {
If (Local0 & EC_ERROR_MASK) {
Release (EC_MUTEX)
Return (0)
}
Local0 = RECV_EC_DATA () /* Temp low byte in 64th °C */
If (And (Local0, EC_ERROR_MASK)) {
If (Local0 & EC_ERROR_MASK) {
Release (EC_MUTEX)
Return (0)
}
Local1 = RECV_EC_DATA () /* Temp high byte in 64th °C */
If (And (Local1, EC_ERROR_MASK)) {
If (Local1 & EC_ERROR_MASK) {
Release (EC_MUTEX)
Return (0)
}

10
src/ec/quanta/it8518/acpi/battery.asl
View File

@ -216,13 +216,13 @@ Device (BATX)
//
// Get battery state from EC
If (And (HB0S, 0x20))
If (HB0S & 0x20)
{
Local0 = 2
}
Else
{
if (And (HB0S, 0x40))
if (HB0S & 0x40)
{
Local0 = One
}
@ -233,7 +233,7 @@ Device (BATX)
}
// Set critical flag if battery is empty
If (And (HB0S, 0x0F) == 0)
If (HB0S & 0x0F == 0)
{
Local0 |= 4
}
@ -263,7 +263,7 @@ Device (BATX)
Local1 = ECAC
If (Local1 >= 0x8000)
{
If (And (Local0, 1))
If (Local0 & 1)
{
Local1 = 0x10000 - Local1
}
@ -275,7 +275,7 @@ Device (BATX)
}
Else
{
If (!(AND (Local0, 2)))
If (!(Local0 & 2))
{
// Battery is not charging
Local1 = Zero

2
src/mainboard/lenovo/s230u/acpi/gpe.asl
View File

@ -6,7 +6,7 @@ Scope (_GPE)
Method (PNOT, 2, Serialized) {
Local0 = Arg0 << Arg1
Not(One << Arg1, Local1)
PDET = Local0 | And (Local1, PDET)
PDET = Local0 | (Local1 & PDET)
If (PDET == Zero) {
// Palm removed
\_SB.PCI0.LPCB.EC0.HKEY.MHKQ (0x60B1)

32
src/soc/intel/baytrail/acpi/irqlinks.asl
View File

@ -31,7 +31,7 @@ Device (LNKA)
IRQ0 = Zero
/* Set the bit from PRTA */
IRQ0 = 1 << And(PRTA, 0x0f)
IRQ0 = 1 << (PRTA & 0x0f)
Return (RTLA)
}
@ -51,7 +51,7 @@ Device (LNKA)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTA, 0x80)) {
If (PRTA & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -90,7 +90,7 @@ Device (LNKB)
IRQ0 = Zero
/* Set the bit from PRTB */
IRQ0 = 1 << And(PRTB, 0x0f)
IRQ0 = 1 << (PRTB & 0x0f)
Return (RTLB)
}
@ -110,7 +110,7 @@ Device (LNKB)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTB, 0x80)) {
If (PRTB & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -149,7 +149,7 @@ Device (LNKC)
IRQ0 = Zero
/* Set the bit from PRTC */
IRQ0 = 1 << And(PRTC, 0x0f)
IRQ0 = 1 << (PRTC & 0x0f)
Return (RTLC)
}
@ -169,7 +169,7 @@ Device (LNKC)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTC, 0x80)) {
If (PRTC & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -208,7 +208,7 @@ Device (LNKD)
IRQ0 = Zero
/* Set the bit from PRTD */
IRQ0 = 1 << And(PRTD, 0x0f)
IRQ0 = 1 << (PRTD & 0x0f)
Return (RTLD)
}
@ -228,7 +228,7 @@ Device (LNKD)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTD, 0x80)) {
If (PRTD & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -267,7 +267,7 @@ Device (LNKE)
IRQ0 = Zero
/* Set the bit from PRTE */
IRQ0 = 1 << And(PRTE, 0x0f)
IRQ0 = 1 << (PRTE & 0x0f)
Return (RTLE)
}
@ -287,7 +287,7 @@ Device (LNKE)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTE, 0x80)) {
If (PRTE & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -326,7 +326,7 @@ Device (LNKF)
IRQ0 = Zero
/* Set the bit from PRTF */
IRQ0 = 1 << And(PRTF, 0x0f)
IRQ0 = 1 << (PRTF & 0x0f)
Return (RTLF)
}
@ -346,7 +346,7 @@ Device (LNKF)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTF, 0x80)) {
If (PRTF & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -385,7 +385,7 @@ Device (LNKG)
IRQ0 = Zero
/* Set the bit from PRTG */
IRQ0 = 1 << And(PRTG, 0x0f)
IRQ0 = 1 << (PRTG & 0x0f)
Return (RTLG)
}
@ -405,7 +405,7 @@ Device (LNKG)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTG, 0x80)) {
If (PRTG & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -444,7 +444,7 @@ Device (LNKH)
IRQ0 = Zero
/* Set the bit from PRTH */
IRQ0 = 1 << And(PRTH, 0x0f)
IRQ0 = 1 << (PRTH & 0x0f)
Return (RTLH)
}
@ -464,7 +464,7 @@ Device (LNKH)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTH, 0x80)) {
If (PRTH & 0x80) {
Return (0x9)
} Else {
Return (0xb)

32
src/soc/intel/braswell/acpi/irqlinks.asl
View File

@ -31,7 +31,7 @@ Device (LNKA)
IRQ0 = Zero
/* Set the bit from PRTA */
IRQ0 = 1 << And(PRTA, 0x0f)
IRQ0 = 1 << (PRTA & 0x0f)
Return (RTLA)
}
@ -51,7 +51,7 @@ Device (LNKA)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTA, 0x80)) {
If (PRTA & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -90,7 +90,7 @@ Device (LNKB)
IRQ0 = Zero
/* Set the bit from PRTB */
IRQ0 = 1 << And(PRTB, 0x0f)
IRQ0 = 1 << (PRTB & 0x0f)
Return (RTLB)
}
@ -110,7 +110,7 @@ Device (LNKB)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTB, 0x80)) {
If (PRTB & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -149,7 +149,7 @@ Device (LNKC)
IRQ0 = Zero
/* Set the bit from PRTC */
IRQ0 = 1 << And(PRTC, 0x0f)
IRQ0 = 1 << (PRTC & 0x0f)
Return (RTLC)
}
@ -169,7 +169,7 @@ Device (LNKC)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTC, 0x80)) {
If (PRTC & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -208,7 +208,7 @@ Device (LNKD)
IRQ0 = Zero
/* Set the bit from PRTD */
IRQ0 = 1 << And(PRTD, 0x0f)
IRQ0 = 1 << (PRTD & 0x0f)
Return (RTLD)
}
@ -228,7 +228,7 @@ Device (LNKD)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTD, 0x80)) {
If (PRTD & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -267,7 +267,7 @@ Device (LNKE)
IRQ0 = Zero
/* Set the bit from PRTE */
IRQ0 = 1 << And(PRTE, 0x0f)
IRQ0 = 1 << (PRTE & 0x0f)
Return (RTLE)
}
@ -287,7 +287,7 @@ Device (LNKE)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTE, 0x80)) {
If (PRTE & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -326,7 +326,7 @@ Device (LNKF)
IRQ0 = Zero
/* Set the bit from PRTF */
IRQ0 = 1 << And(PRTF, 0x0f)
IRQ0 = 1 << (PRTF & 0x0f)
Return (RTLF)
}
@ -346,7 +346,7 @@ Device (LNKF)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTF, 0x80)) {
If (PRTF & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -385,7 +385,7 @@ Device (LNKG)
IRQ0 = Zero
/* Set the bit from PRTG */
IRQ0 = 1 << And(PRTG, 0x0f)
IRQ0 = 1 << (PRTG & 0x0f)
Return (RTLG)
}
@ -405,7 +405,7 @@ Device (LNKG)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTG, 0x80)) {
If (PRTG & 0x80) {
Return (0x9)
} Else {
Return (0xb)
@ -444,7 +444,7 @@ Device (LNKH)
IRQ0 = Zero
/* Set the bit from PRTH */
IRQ0 = 1 << And(PRTH, 0x0f)
IRQ0 = 1 << (PRTH & 0x0f)
Return (RTLH)
}
@ -464,7 +464,7 @@ Device (LNKH)
/* Status */
Method (_STA, 0, Serialized)
{
If(And(PRTH, 0x80)) {
If (PRTH & 0x80) {
Return (0x9)
} Else {
Return (0xb)

2
src/soc/intel/cannonlake/acpi/gpio.asl
View File

@ -140,7 +140,7 @@ Method (CGPM, 2, Serialized)
/* Mask off current PM bits */
PCRA (Local0, GPIO_MISCCFG, Not (MISCCFG_GPIO_PM_CONFIG_BITS))
/* Mask in requested bits */
PCRO (Local0, GPIO_MISCCFG, And (Arg1, MISCCFG_GPIO_PM_CONFIG_BITS))
PCRO (Local0, GPIO_MISCCFG, Arg1 & MISCCFG_GPIO_PM_CONFIG_BITS)
}
}

4
src/southbridge/intel/i82371eb/acpi/intx.asl
View File

@ -14,7 +14,7 @@ Device(intx) { \
Name(_UID, uid) \
\
Method(_STA, 0) { \
If (And(pinx, 0x80)) { \
If (pinx & 0x80) { \
Return(0x09) \
} \
Return(0x0B) \
@ -30,7 +30,7 @@ Device(intx) { \
\
Method(_CRS ,0) { \
CreateWordField(IRQB, 1, IRQN) \
IRQN = 1 << And(pinx, 0x0f) \
IRQN = 1 << (pinx & 0x0f) \
Return(IRQB) \
} \
\

4
src/southbridge/intel/i82371eb/acpi/pirq.asl
View File

@ -24,7 +24,7 @@ Device(intx) { \
Name(_UID, uid) \
\
Method(_STA, 0) { \
If (And(pinx, 0x80)) { \
If (pinx & 0x80) { \
Return(0x09) \
} \
Return(0x0B) \
@ -40,7 +40,7 @@ Device(intx) { \
\
Method(_CRS ,0) { \
CreateWordField(IRQB, 1, IRQN) \
IRQN = 1 << And(pinx, 0x0f) \
IRQN = 1 << (pinx & 0x0f) \
Return(IRQB) \
} \
\

2
src/superio/acpi/pnp.asl
View File

@ -116,7 +116,7 @@
#define PNP_WRITE_IO(IO_TO, RESOURCE, IO_TAG) \
CreateWordField (RESOURCE, IO_TAG._MIN, IO_TAG##I)\
IO_TO##_LOW_BYTE = And(IO_TAG##I, 0xff) \
IO_TO##_LOW_BYTE = IO_TAG##I & 0xff \
IO_TO##_HIGH_BYTE = IO_TAG##I >> 8
#define PNP_WRITE_IRQ(IRQ_TO, RESOURCE, IRQ_TAG) \

8
src/superio/winbond/w83627hf/acpi/superio.asl
View File

@ -724,7 +724,7 @@ Device(SIO) {
{
Local0 = 0x00
ENTER_CONFIG_MODE (3)
If (!And(OPT2, 0x30))
If (!(OPT2 & 0x30))
{
If (ACTR) {
Local0 = 0x0F
@ -849,7 +849,7 @@ Device(SIO) {
{
Local0 = 0x00
ENTER_CONFIG_MODE (3)
If (And(OPT2, 0x30))
If (OPT2 & 0x30)
{
If (ACTR) {
Local0 = 0x0F
@ -1348,7 +1348,7 @@ Device(SIO) {
ENTER_CONFIG_MODE (9)
Local0 = OPT4
Local0 &= 63
OPT4 = Local0 | (And(Arg0, 0x03) << 6)
OPT4 = Local0 | ((Arg0 & 3) << 6)
EXIT_CONFIG_MODE ()
}
@ -1358,7 +1358,7 @@ Device(SIO) {
ENTER_CONFIG_MODE (8)
Local0 = OPT4
Local0 &= 63
OPT4 = Local0 | (And(Arg0, 0x03) << 6)
OPT4 = Local0 | ((Arg0 & 3) << 6)
EXIT_CONFIG_MODE ()
}