soc/intel/apollolake: Add function to translate gpio_t into ACPI pin

There are four GPIO communities in this SOC and they are implemented
as separate ACPI devices.  This means the pin number that is used in
an ACPI GPIO declaration needs to be relative to the community that
the pin resides in.  Also select GENERIC_GPIO_LIB in the SOC Kconfig
so this function actually gets used.

This was tested on the reef mainboard by verifying the output of the
SSDT for the Maxim 98357A codec that the assigned GPIO_76 is listed
as pin 0x24 which is the value relative to the Northwest community.

Change-Id: Iad2ab8eccf4c91185a075ffce8d41c81f06c1113
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/15513
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Duncan Laurie 2016-06-29 10:47:48 -07:00
parent 5b6c28c43d
commit d25dd99866
2 changed files with 19 additions and 0 deletions

View File

@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select C_ENVIRONMENT_BOOTBLOCK
select COLLECT_TIMESTAMPS
select COMMON_FADT
select GENERIC_GPIO_LIB
select HAVE_INTEL_FIRMWARE
select HAVE_SMI_HANDLER
select MMCONF_SUPPORT

View File

@ -132,3 +132,21 @@ const char *gpio_acpi_path(gpio_t gpio_num)
return NULL;
}
uint16_t gpio_acpi_pin(gpio_t gpio_num)
{
const struct pad_community *comm = gpio_get_community(gpio_num);
switch (comm->port) {
case GPIO_NORTH:
return PAD_N(gpio_num);
case GPIO_NORTHWEST:
return PAD_NW(gpio_num);
case GPIO_WEST:
return PAD_W(gpio_num);
case GPIO_SOUTHWEST:
return PAD_SW(gpio_num);
}
return gpio_num;
}