From d27dd97e17a8dfe4a9d8861cda51feabce809590 Mon Sep 17 00:00:00 2001 From: Mark Hsieh Date: Tue, 21 Dec 2021 21:04:12 +0800 Subject: [PATCH] mb/google/brya/var/gimble: Configure GPIO to release PERST# earlier This change in power sequencing appears to fix issues with power consumption of the SD card controller. Possibly this change ensures the device has enough time to properly initialize itself after reset is deasserted but before it is accessed. BUG=b:206014046 TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error. Signed-off-by: Mark Hsieh Change-Id: I90e5dd074ceda365283fe7e1f43dfd8c692d7338 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60279 Tested-by: build bot (Jenkins) Reviewed-by: YH Lin Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/gimble/gpio.c | 6 +++++- src/mainboard/google/brya/variants/gimble4es/gpio.c | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/gimble/gpio.c b/src/mainboard/google/brya/variants/gimble/gpio.c index 04829e5a89..c0749c3d52 100644 --- a/src/mainboard/google/brya/variants/gimble/gpio.c +++ b/src/mainboard/google/brya/variants/gimble/gpio.c @@ -83,6 +83,8 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_H8, NONE), /* H9 : I2C4_SCL ==> NC */ PAD_NC(GPP_H9, NONE), + /* H13 : I2C7_SCL ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_H13, 1, DEEP), /* H15 : DDPB_CTRLCLK ==> NC */ PAD_NC(GPP_H15, NONE), /* H17 : DDPB_CTRLDATA ==> NC*/ @@ -149,12 +151,14 @@ static const struct pad_config early_gpio_table[] = { /* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* H13 : I2C7_SCL ==> EN_PP3300_SD */ - PAD_NC(GPP_H13, UP_20K), + PAD_CFG_GPO(GPP_H13, 1, DEEP), }; static const struct pad_config romstage_gpio_table[] = { /* B4 : PROC_GP3 ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_B4, 1, DEEP), + /* D18 : UART1_TXD ==> SD_PE_RST_L */ + PAD_CFG_GPO(GPP_D18, 1, DEEP), }; const struct pad_config *variant_gpio_override_table(size_t *num) diff --git a/src/mainboard/google/brya/variants/gimble4es/gpio.c b/src/mainboard/google/brya/variants/gimble4es/gpio.c index 2ea9f90995..685b37abbb 100644 --- a/src/mainboard/google/brya/variants/gimble4es/gpio.c +++ b/src/mainboard/google/brya/variants/gimble4es/gpio.c @@ -83,6 +83,8 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_H8, NONE), /* H9 : I2C4_SCL ==> NC */ PAD_NC(GPP_H9, NONE), + /* H13 : I2C7_SCL ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_H13, 1, DEEP), /* H15 : DDPB_CTRLCLK ==> NC */ PAD_NC(GPP_H15, NONE), /* H17 : DDPB_CTRLDATA ==> NC*/ @@ -149,12 +151,14 @@ static const struct pad_config early_gpio_table[] = { /* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* H13 : I2C7_SCL ==> EN_PP3300_SD */ - PAD_NC(GPP_H13, UP_20K), + PAD_CFG_GPO(GPP_H13, 1, DEEP), }; static const struct pad_config romstage_gpio_table[] = { /* B4 : PROC_GP3 ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_B4, 1, DEEP), + /* D18 : UART1_TXD ==> SD_PE_RST_L */ + PAD_CFG_GPO(GPP_D18, 1, DEEP), }; const struct pad_config *variant_gpio_override_table(size_t *num)