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soc/intel: unify VBT fetching API 

Skylake used the inner function, wrapping it in the same set of tests as
the common code does, but expressed differently.

Change-Id: Ifa6912255e7874a6e80301d49128adda6f624209
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/26037
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Georgi 2018-05-03 18:06:15 +02:00
parent 381feb8883
commit d2990ff5a3
1 changed files with 1 additions and 16 deletions
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17
src/soc/intel/skylake/chip_fsp20.c
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@ -97,11 +97,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
FSP_S_CONFIG *params = &supd->FspsConfig;
FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig;
static struct soc_intel_skylake_config *config;
uintptr_t vbt_data = 0;
uintptr_t vbt_data = (uintptr_t)vbt_get();
int i;
int is_s3_wakeup = acpi_is_wakeup_s3();
struct device *dev = SA_DEV_ROOT;
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
@ -117,19 +115,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
printk(BIOS_DEBUG, "psys_pmax = %d\n", tconfig->PsysPmax);
}
/* Load VBT */
if (is_s3_wakeup) {
printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n");
} else if (display_init_required() && IS_ENABLED(CONFIG_RUN_FSP_GOP)) {
/* Get VBT data */
vbt_data = (uintptr_t)locate_vbt();
if (vbt_data)
printk(BIOS_DEBUG, "Passing VBT to GOP\n");
else
printk(BIOS_DEBUG, "VBT not found!\n");
} else {
printk(BIOS_DEBUG, "Not passing VBT to GOP\n");
}
params->GraphicsConfigPtr = (u32) vbt_data;
for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) {