ifdtool: Properly set + decode flmstr regs for IFD v2
flmstr register bits have slightly different meaning for IFD v2. BUG=chrome-os-partner:45091, chrome-os-partner:43461 TEST=Run `ifdtool -d image.bin` on IFD v1 locked squawks image: Found Master Section FLMSTR1: 0x0a0b0000 (Host CPU/BIOS) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: disabled Host CPU/BIOS Region Write Access: enabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: disabled Host CPU/BIOS Region Read Access: enabled Flash Descriptor Read Access: enabled Requester ID: 0x0000 FLMSTR2: 0x0c0d0000 (Intel ME) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: enabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: enabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: enabled Requester ID: 0x0000 FLMSTR3: 0x08080118 (GbE) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: disabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: disabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: disabled Requester ID: 0x0118 Then, run `ifdtool -l image.bin` and verify newly locked image is identical. Next, run `ifdtool -l image.bin` on unlocked glados image. Verify that locked and unlocked regions are identical to above. Finally, burn glados image, run `flashrom -V`, and verify ME regions is locked and descriptor region is RO. BRANCH=None Change-Id: I8a65bdc5edd0d888138b88c1189f8badd1404b64 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 11c434835a66a50ab2c0c01a084edc96cbe052da Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Original-Change-Id: I875dfce6f5cf57831714702872bfe636f8f953f4 Original-Reviewed-on: https://chromium-review.googlesource.com/298968 Original-Commit-Ready: Shawn N <shawnn@chromium.org> Original-Tested-by: Shawn N <shawnn@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11658 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -443,36 +443,50 @@ static void dump_fpsba(fpsba_t * fpsba)
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static void decode_flmstr(uint32_t flmstr)
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{
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int wr_shift, rd_shift;
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if (ifd_version >= IFD_VERSION_2) {
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wr_shift = FLMSTR_WR_SHIFT_V2;
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rd_shift = FLMSTR_RD_SHIFT_V2;
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} else {
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wr_shift = FLMSTR_WR_SHIFT_V1;
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rd_shift = FLMSTR_RD_SHIFT_V1;
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}
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/* EC region access only available on v2+ */
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if (ifd_version >= IFD_VERSION_2)
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printf(" EC Region Write Access: %s\n",
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(flmstr & (1 << 29)) ? "enabled" : "disabled");
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(flmstr & (1 << (wr_shift + 8))) ?
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"enabled" : "disabled");
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printf(" Platform Data Region Write Access: %s\n",
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(flmstr & (1 << 28)) ? "enabled" : "disabled");
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(flmstr & (1 << (wr_shift + 4))) ? "enabled" : "disabled");
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printf(" GbE Region Write Access: %s\n",
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(flmstr & (1 << 27)) ? "enabled" : "disabled");
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(flmstr & (1 << (wr_shift + 3))) ? "enabled" : "disabled");
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printf(" Intel ME Region Write Access: %s\n",
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(flmstr & (1 << 26)) ? "enabled" : "disabled");
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(flmstr & (1 << (wr_shift + 2))) ? "enabled" : "disabled");
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printf(" Host CPU/BIOS Region Write Access: %s\n",
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(flmstr & (1 << 25)) ? "enabled" : "disabled");
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(flmstr & (1 << (wr_shift + 1))) ? "enabled" : "disabled");
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printf(" Flash Descriptor Write Access: %s\n",
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(flmstr & (1 << 24)) ? "enabled" : "disabled");
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(flmstr & (1 << wr_shift)) ? "enabled" : "disabled");
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if (ifd_version >= IFD_VERSION_2)
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printf(" EC Region Read Access: %s\n",
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(flmstr & (1 << 21)) ? "enabled" : "disabled");
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(flmstr & (1 << (rd_shift + 8))) ?
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"enabled" : "disabled");
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printf(" Platform Data Region Read Access: %s\n",
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(flmstr & (1 << 20)) ? "enabled" : "disabled");
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(flmstr & (1 << (rd_shift + 4))) ? "enabled" : "disabled");
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printf(" GbE Region Read Access: %s\n",
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(flmstr & (1 << 19)) ? "enabled" : "disabled");
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(flmstr & (1 << (rd_shift + 3))) ? "enabled" : "disabled");
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printf(" Intel ME Region Read Access: %s\n",
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(flmstr & (1 << 18)) ? "enabled" : "disabled");
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(flmstr & (1 << (rd_shift + 2))) ? "enabled" : "disabled");
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printf(" Host CPU/BIOS Region Read Access: %s\n",
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(flmstr & (1 << 17)) ? "enabled" : "disabled");
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(flmstr & (1 << (rd_shift + 1))) ? "enabled" : "disabled");
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printf(" Flash Descriptor Read Access: %s\n",
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(flmstr & (1 << 16)) ? "enabled" : "disabled");
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(flmstr & (1 << rd_shift)) ? "enabled" : "disabled");
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printf(" Requester ID: 0x%04x\n\n",
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flmstr & 0xffff);
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/* Requestor ID doesn't exist for ifd 2 */
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if (ifd_version < IFD_VERSION_2)
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printf(" Requester ID: 0x%04x\n\n",
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flmstr & 0xffff);
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}
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static void dump_fmba(fmba_t * fmba)
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@ -740,14 +754,43 @@ static void set_em100_mode(char *filename, char *image, int size)
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static void lock_descriptor(char *filename, char *image, int size)
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{
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int wr_shift, rd_shift;
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fdbar_t *fdb = find_fd(image, size);
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fmba_t *fmba = (fmba_t *) (image + (((fdb->flmap1) & 0xff) << 4));
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/* TODO: Dynamically take Platform Data Region and GbE Region
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* into regard.
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*/
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fmba->flmstr1 = 0x0a0b0000;
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fmba->flmstr2 = 0x0c0d0000;
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fmba->flmstr3 = 0x08080118;
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if (ifd_version >= IFD_VERSION_2) {
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wr_shift = FLMSTR_WR_SHIFT_V2;
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rd_shift = FLMSTR_RD_SHIFT_V2;
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/* Clear non-reserved bits */
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fmba->flmstr1 &= 0xff;
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fmba->flmstr2 &= 0xff;
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fmba->flmstr3 &= 0xff;
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} else {
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wr_shift = FLMSTR_WR_SHIFT_V1;
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rd_shift = FLMSTR_RD_SHIFT_V1;
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fmba->flmstr1 = 0;
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fmba->flmstr2 = 0;
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/* Requestor ID */
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fmba->flmstr3 = 0x118;
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}
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/* CPU/BIOS can read descriptor, BIOS, and GbE. */
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fmba->flmstr1 |= 0xb << rd_shift;
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/* CPU/BIOS can write BIOS and GbE. */
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fmba->flmstr1 |= 0xa << wr_shift;
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/* ME can read descriptor, ME, and GbE. */
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fmba->flmstr2 |= 0xd << rd_shift;
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/* ME can write ME and GbE. */
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fmba->flmstr2 |= 0xc << wr_shift;
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/* GbE can write only GbE. */
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fmba->flmstr3 |= 0x8 << rd_shift;
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/* GbE can read only GbE. */
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fmba->flmstr3 |= 0x8 << wr_shift;
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write_image(filename, image, size);
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}
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@ -756,9 +799,17 @@ static void unlock_descriptor(char *filename, char *image, int size)
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{
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fdbar_t *fdb = find_fd(image, size);
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fmba_t *fmba = (fmba_t *) (image + (((fdb->flmap1) & 0xff) << 4));
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fmba->flmstr1 = 0xffff0000;
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fmba->flmstr2 = 0xffff0000;
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fmba->flmstr3 = 0x08080118;
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if (ifd_version >= IFD_VERSION_2) {
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/* Access bits for each region are read: 19:8 write: 31:20 */
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fmba->flmstr1 = 0xffffff00 | (fmba->flmstr1 & 0xff);
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fmba->flmstr2 = 0xffffff00 | (fmba->flmstr2 & 0xff);
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fmba->flmstr3 = 0xffffff00 | (fmba->flmstr3 & 0xff);
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} else {
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fmba->flmstr1 = 0xffff0000;
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fmba->flmstr2 = 0xffff0000;
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fmba->flmstr3 = 0x08080118;
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}
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write_image(filename, image, size);
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}
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@ -101,6 +101,15 @@ typedef struct {
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uint32_t pchstrp17;
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} __attribute__((packed)) fpsba_t;
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/*
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* WR / RD bits start at different locations within the flmstr regs, but
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* otherwise have identical meaning.
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*/
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#define FLMSTR_WR_SHIFT_V1 24
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#define FLMSTR_WR_SHIFT_V2 20
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#define FLMSTR_RD_SHIFT_V1 16
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#define FLMSTR_RD_SHIFT_V2 8
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// master
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typedef struct {
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uint32_t flmstr1;
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