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superio/smsc/sch4037: Cleanup and fix .c inclusion 

Clean up both ram and rom stage support and fix board to match.

Change-Id: I55e3e7338c0551f0fb663eb9707f16ecdc1aca35
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6509
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Edward O'Callaghan 2014-08-06 21:32:50 +10:00
parent 47b8075bb1
commit d2da65e3ab
5 changed files with 28 additions and 34 deletions
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2
src/mainboard/amd/dinar/romstage.c
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@ -32,7 +32,7 @@
#include "agesawrapper.h"
#include <northbridge/amd/agesa/agesawrapper_call.h>
#include "cpu/x86/bist.h"
#include "superio/smsc/sch4037/sch4037_early_init.c"
#include <superio/smsc/sch4037/sch4037.h>
#include <superio/smsc/sio1036/sio1036.h>
#include "cpu/x86/lapic.h"
#include "nb_cimx.h"

1
src/superio/smsc/sch4037/Makefile.inc
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@ -17,4 +17,5 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
romstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += sch4037_early_init.c
ramstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += superio.c

5
src/superio/smsc/sch4037/sch4037.h
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@ -20,7 +20,6 @@
#ifndef SUPERIO_SCH_4037_H
#define SUPERIO_SCH_4037_H
#define SCH4037_FDD 0 /* FDD */
#define SCH4037_LPT 3 /* LPT */
#define SMSCSUPERIO_SP1 4 /* Com1 */
@ -31,4 +30,6 @@
#define SCH4037_RUNTIME 0x0A /* Runtime */
#define SCH4037_XBUS 0x0B /* X-BUS */
#endif //SUPERIO_SCH_4037_H
void sch4037_early_init(unsigned port);
#endif /* SUPERIO_SCH_4037_H */

11
src/superio/smsc/sch4037/sch4037_early_init.c
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@ -19,21 +19,24 @@
#include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "sch4037.h"
static inline void pnp_enter_conf_state(device_t dev)
static void pnp_enter_conf_state(device_t dev)
{
unsigned port = dev>>8;
unsigned port = dev >> 8;
outb(0x55, port);
}
static void pnp_exit_conf_state(device_t dev)
{
unsigned port = dev>>8;
unsigned port = dev >> 8;
outb(0xaa, port);
}
static inline void sch4037_early_init(unsigned port)
void sch4037_early_init(unsigned port)
{
device_t dev;

43
src/superio/smsc/sch4037/superio.c
View File

@ -24,20 +24,23 @@
#include <device/pnp.h>
#include <superio/conf_mode.h>
#include <console/console.h>
#include <device/smbus.h>
#include <string.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include "sch4037.h"
/* Forward declarations */
static void enable_dev(device_t dev);
static void sch4037_init(device_t dev);
static void sch4037_init(device_t dev)
{
if (!dev->enabled) {
return;
}
struct chip_operations superio_smsc_sch4037_ops = {
CHIP_NAME("SMSC SCH4037 Super I/O")
.enable_dev = enable_dev,
};
switch(dev->path.pnp.device) {
case SCH4037_KBC:
pc_keyboard_init();
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
@ -54,24 +57,10 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(device_t dev)
{
printk(BIOS_SPEW, "file '%s',line %d, %s()\n", __FILE__, __LINE__, __func__);
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
static void sch4037_init(device_t dev)
{
struct resource *res0, *res1;
if (!dev->enabled) {
return;
}
switch(dev->path.pnp.device) {
case SCH4037_KBC:
res0 = find_resource(dev, PNP_IDX_IO0);
res1 = find_resource(dev, PNP_IDX_IO1);
pc_keyboard_init();
break;
}
}
struct chip_operations superio_smsc_sch4037_ops = {
CHIP_NAME("SMSC SCH4037 Super I/O")
.enable_dev = enable_dev,
};