soc/amd/*/Makefile: drop wrong EFS diagrams
The EFS data structure diagrams in the Makefiles of Picasso and newer SoCs were wrong, since the BIOS directory table pointer is in a different location than shown in the diagram. Since the diagram also wasn't that easy to understand and amdfwtool does all of that handling, drop the wrong diagram from the Makefiles. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5f86fea29f956ff10746d35dbe967a4a89e11cca Reviewed-on: https://review.coreboot.org/c/coreboot/+/77799 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
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@ -39,13 +39,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/cezanne/acpi
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/cezanne
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
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# ROMSIG Normally At ROMBASE + 0x20000
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# +-----------+---------------+----------------+------------+
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# |0x55AA55AA | | | |
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# +-----------+---------------+----------------+------------+
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# | | PSPDIR ADDR | BIOSDIR ADDR |
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# +-----------+---------------+----------------+
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# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
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# Building the cbfs image will fail if the offset isn't large enough
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AMD_FW_AB_POSITION := 0x40
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@ -43,13 +43,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/glinda/acpi
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/glinda
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
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# ROMSIG Normally At ROMBASE + 0x20000
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# +-----------+---------------+----------------+------------+
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# |0x55AA55AA | | | |
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# +-----------+---------------+----------------+------------+
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# | | PSPDIR ADDR | BIOSDIR ADDR |
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# +-----------+---------------+----------------+
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# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
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# Building the cbfs image will fail if the offset isn't large enough
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AMD_FW_AB_POSITION := 0x40
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@ -42,13 +42,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/mendocino/acpi
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/mendocino
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
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# ROMSIG Normally At ROMBASE + 0x20000
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# +-----------+---------------+----------------+------------+
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# |0x55AA55AA | | | |
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# +-----------+---------------+----------------+------------+
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# | | PSPDIR ADDR | BIOSDIR ADDR |
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# +-----------+---------------+----------------+
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# 0x80 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
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# Building the cbfs image will fail if the offset isn't large enough
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AMD_FW_AB_POSITION := 0x80
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@ -46,13 +46,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/phoenix/acpi
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/phoenix
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
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# ROMSIG Normally At ROMBASE + 0x20000
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# +-----------+---------------+----------------+------------+
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# |0x55AA55AA | | | |
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# +-----------+---------------+----------------+------------+
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# | | PSPDIR ADDR | BIOSDIR ADDR |
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# +-----------+---------------+----------------+
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# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
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# Building the cbfs image will fail if the offset isn't large enough
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AMD_FW_AB_POSITION := 0x40
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@ -45,13 +45,6 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
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CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
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# ROMSIG Normally At ROMBASE + 0x20000
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# +-----------+---------------+----------------+------------+
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# |0x55AA55AA | | | |
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# +-----------+---------------+----------------+------------+
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# | | PSPDIR ADDR | BIOSDIR ADDR |
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# +-----------+---------------+----------------+
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# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
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# Building the cbfs image will fail if the offset isn't large enough
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AMD_FW_AB_POSITION := 0x40
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