soc/amd/*/Makefile: drop wrong EFS diagrams

The EFS data structure diagrams in the Makefiles of Picasso and newer
SoCs were wrong, since the BIOS directory table pointer is in a
different location than shown in the diagram. Since the diagram also
wasn't that easy to understand and amdfwtool does all of that handling,
drop the wrong diagram from the Makefiles.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5f86fea29f956ff10746d35dbe967a4a89e11cca
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
This commit is contained in:
Felix Held 2023-09-11 19:42:31 +02:00
parent f372c40b90
commit d30e081295
5 changed files with 0 additions and 35 deletions

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@ -39,13 +39,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/cezanne/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/cezanne
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
# ROMSIG Normally At ROMBASE + 0x20000
# +-----------+---------------+----------------+------------+
# |0x55AA55AA | | | |
# +-----------+---------------+----------------+------------+
# | | PSPDIR ADDR | BIOSDIR ADDR |
# +-----------+---------------+----------------+
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40

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@ -43,13 +43,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/glinda/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/glinda
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
# ROMSIG Normally At ROMBASE + 0x20000
# +-----------+---------------+----------------+------------+
# |0x55AA55AA | | | |
# +-----------+---------------+----------------+------------+
# | | PSPDIR ADDR | BIOSDIR ADDR |
# +-----------+---------------+----------------+
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40

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@ -42,13 +42,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/mendocino/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/mendocino
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
# ROMSIG Normally At ROMBASE + 0x20000
# +-----------+---------------+----------------+------------+
# |0x55AA55AA | | | |
# +-----------+---------------+----------------+------------+
# | | PSPDIR ADDR | BIOSDIR ADDR |
# +-----------+---------------+----------------+
# 0x80 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x80

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@ -46,13 +46,6 @@ CPPFLAGS_common += -I$(src)/soc/amd/phoenix/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/phoenix
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
# ROMSIG Normally At ROMBASE + 0x20000
# +-----------+---------------+----------------+------------+
# |0x55AA55AA | | | |
# +-----------+---------------+----------------+------------+
# | | PSPDIR ADDR | BIOSDIR ADDR |
# +-----------+---------------+----------------+
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40

View File

@ -45,13 +45,6 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
# ROMSIG Normally At ROMBASE + 0x20000
# +-----------+---------------+----------------+------------+
# |0x55AA55AA | | | |
# +-----------+---------------+----------------+------------+
# | | PSPDIR ADDR | BIOSDIR ADDR |
# +-----------+---------------+----------------+
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
# Building the cbfs image will fail if the offset isn't large enough
AMD_FW_AB_POSITION := 0x40