mb/google/volteer/var/voxel: Disable SRCCLKREQ1#

According to the schematic,SRCCLKREQ1# is not connected,so disable it
on voxel.

BUG=b:171279034
BRANCH=volteer
TEST="emerge-volteer coreboot" compiles successfully.

Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: Ibc4f766bd737f30a9ac3c7354d54398e0c36d59d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46612
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sheng-Liang Pan 2020-10-21 11:16:08 +08:00 committed by Patrick Georgi
parent 9572dd8953
commit d3108d6c89
1 changed files with 3 additions and 0 deletions

View File

@ -14,6 +14,9 @@ chip soc/intel/tigerlake
.tdp_pl4 = 105,
}"
# Disable SRCCLKREQ1#
register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED"
device domain 0 on
device ref dptf on
chip drivers/intel/dptf