mb/google/zork: update USB 2.0 controller Lane Parameter for berknip
Enhance USB 2.0 C0/C1 A0/A1 SI by increasing the level of "HS DC Voltage Level" and " Disconnect Threshold Adjustment" registers. COMPDISTUNE0: 0x3->0x7 TXVREFTUNE0: 0x6->0xf BUG=b:166398726 BRANCH=zork TEST=1. emerge-zork coreboot 2. check U2 register is set correctly. 3. U2 SI all pass Change-Id: I69d942605c6d43ece0d71f67df3a5e00b998219b Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46545 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -21,6 +21,54 @@ chip soc/amd/picasso
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register "telemetry_vddcr_soc_offset" = "0"
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# End : OPN Performance Configuration
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# USB 2.0 strength
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register "usb_2_port_tune_params[0]" = "{
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.com_pds_tune = 0x07,
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.sq_rx_tune = 0x3,
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.tx_fsls_tune = 0x3,
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.tx_pre_emp_amp_tune = 0x03,
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.tx_pre_emp_pulse_tune = 0x0,
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.tx_rise_tune = 0x1,
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.rx_vref_tune = 0xf,
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.tx_hsxv_tune = 0x3,
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.tx_res_tune = 0x01,
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}"
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register "usb_2_port_tune_params[1]" = "{
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.com_pds_tune = 0x07,
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.sq_rx_tune = 0x3,
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.tx_fsls_tune = 0x3,
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.tx_pre_emp_amp_tune = 0x03,
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.tx_pre_emp_pulse_tune = 0x0,
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.tx_rise_tune = 0x1,
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.rx_vref_tune = 0xf,
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.tx_hsxv_tune = 0x3,
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.tx_res_tune = 0x01,
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}"
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register "usb_2_port_tune_params[2]" = "{
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.com_pds_tune = 0x07,
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.sq_rx_tune = 0x3,
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.tx_fsls_tune = 0x3,
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.tx_pre_emp_amp_tune = 0x03,
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.tx_pre_emp_pulse_tune = 0x0,
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.tx_rise_tune = 0x1,
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.rx_vref_tune = 0xf,
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.tx_hsxv_tune = 0x3,
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.tx_res_tune = 0x01,
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}"
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register "usb_2_port_tune_params[3]" = "{
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.com_pds_tune = 0x07,
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.sq_rx_tune = 0x3,
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.tx_fsls_tune = 0x3,
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.tx_pre_emp_amp_tune = 0x03,
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.tx_pre_emp_pulse_tune = 0x0,
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.tx_rise_tune = 0x1,
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.rx_vref_tune = 0xf,
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.tx_hsxv_tune = 0x3,
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.tx_res_tune = 0x01,
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}"
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# Enable I2C2 for trackpad, touchscreen, pen at 400kHz
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register "i2c[2]" = "{
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