From d3687cd994ac38af78c639c3c423dcbc3f13cacf Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Tue, 15 Feb 2022 21:49:49 +0100 Subject: [PATCH] sb/intel/ibexpeak: Constify struct southbridge_intel_ibexpeak_config Change-Id: I096ccd0ec224b98038d290422f568666bbede43a Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/61985 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/southbridge/intel/ibexpeak/lpc.c | 10 ++++------ src/southbridge/intel/ibexpeak/sata.c | 8 +++----- 2 files changed, 7 insertions(+), 11 deletions(-) diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 01836b1698..53fce008f5 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -25,8 +25,6 @@ #define NMI_OFF 0 -typedef struct southbridge_intel_ibexpeak_config config_t; - /** * Set miscellaneous static southbridge features. * @@ -113,7 +111,7 @@ static void pch_pirq_init(struct device *dev) static void pch_gpi_routing(struct device *dev) { /* Get the chip configuration */ - config_t *config = dev->chip_info; + const struct southbridge_intel_ibexpeak_config *config = dev->chip_info; u32 reg32 = 0; /* An array would be much nicer here, or some @@ -146,7 +144,7 @@ static void pch_power_options(struct device *dev) u32 reg32; const char *state; /* Get the chip configuration */ - config_t *config = dev->chip_info; + const struct southbridge_intel_ibexpeak_config *config = dev->chip_info; /* Which state do we want to goto after g3 (power restored)? * 0 == S0 Full On @@ -446,7 +444,7 @@ static void lpc_init(struct device *dev) static void pch_lpc_read_resources(struct device *dev) { struct resource *res; - config_t *config = dev->chip_info; + const struct southbridge_intel_ibexpeak_config *config = dev->chip_info; u8 io_index = 0; /* Get the normal PCI resources of this device. */ @@ -521,7 +519,7 @@ static const char *lpc_acpi_name(const struct device *dev) static void southbridge_fill_ssdt(const struct device *device) { struct device *dev = pcidev_on_root(0x1f, 0); - config_t *chip = dev->chip_info; + struct southbridge_intel_ibexpeak_config *chip = dev->chip_info; intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8); intel_acpi_gen_def_acpi_pirq(dev); diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index 171057ecd0..4107abbc3e 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -13,8 +13,6 @@ #include "chip.h" #include "pch.h" -typedef struct southbridge_intel_ibexpeak_config config_t; - static inline u32 sir_read(struct device *dev, int idx) { pci_write_config32(dev, SATA_SIRI, idx); @@ -32,7 +30,7 @@ static void sata_init(struct device *dev) u32 reg32; u16 reg16; /* Get the chip configuration */ - config_t *config = dev->chip_info; + const struct southbridge_intel_ibexpeak_config *config = dev->chip_info; printk(BIOS_DEBUG, "SATA: Initializing...\n"); @@ -168,7 +166,7 @@ static void sata_init(struct device *dev) static void sata_enable(struct device *dev) { /* Get the chip configuration */ - config_t *config = dev->chip_info; + const struct southbridge_intel_ibexpeak_config *config = dev->chip_info; u16 map = 0; if (!config) @@ -190,7 +188,7 @@ static void sata_enable(struct device *dev) static void sata_fill_ssdt(const struct device *dev) { - config_t *config = dev->chip_info; + const struct southbridge_intel_ibexpeak_config *config = dev->chip_info; generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map); }