soc/intel/adl: Update power limits for ADL-M SKU

Update SKU specific power limits for ADL-M as per document 643775.

BUG=None
BRANCH=None

Change-Id: I40b9b3a508c549d940e1c2c9e8b4079695b694e6
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56976
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

src/soc/intel/alderlake/chip.h

@@ -24,6 +24,7 @@ enum soc_intel_alderlake_power_limits {
 	ADL_P_POWER_LIMITS_482_CORE,
 	ADL_P_POWER_LIMITS_682_CORE,
 	ADL_M_POWER_LIMITS_282_CORE,
+	ADL_M_POWER_LIMITS_242_CORE,
 	ADL_POWER_LIMITS_COUNT
 };
 

src/soc/intel/alderlake/chipset.cb

@@ -21,11 +21,17 @@ chip soc/intel/alderlake
 	}"
 
 	register "power_limits_config[ADL_M_POWER_LIMITS_282_CORE]" = "{
+		.tdp_pl1_override = 15,
+		.tdp_pl2_override = 45,
+	}"
+
+	register "power_limits_config[ADL_M_POWER_LIMITS_242_CORE]" = "{
 		.tdp_pl1_override = 9,
 		.tdp_pl2_override = 30,
 		.tdp_pl4 = 68,
 	}"
 
+
 	device domain 0 on
 		device gpio 0 alias pch_gpio on end
 		device pci 00.0 alias system_agent on end

src/soc/intel/alderlake/systemagent.c

@@ -87,6 +87,9 @@ void soc_systemagent_init(struct device *dev)
 	case PCI_DEVICE_ID_INTEL_ADL_M_ID_1:
 		soc_config = &config->power_limits_config[ADL_M_POWER_LIMITS_282_CORE];
 		break;
+	case PCI_DEVICE_ID_INTEL_ADL_M_ID_2:
+		soc_config = &config->power_limits_config[ADL_M_POWER_LIMITS_242_CORE];
+		break;
 	default:
 		printk(BIOS_ERR, "ADL: unknown SA ID: 0x%4x, skipping power limits configuration\n",
 			sa_pci_id);