arch/x86: Relocate GDT in verstage, romstage, and postcar
In each stage keep GDT in the code region. This accommodates platforms, such as glk, that are executing out of CAR. The gdt is small and loading it is trivial so just do it unconditionally instead of introducing another Kconfig. BUG=b:78656686 Change-Id: I01ded6e9b358b23e04d92bef5263bfe8c2a5ec5a Signed-off-by: Hannah Williams <hannah.williams@intel.com> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25895 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
This commit is contained in:
Hannah Williams
Aaron Durbin
parent
0f9af5500e
commit
d3c0c0c318
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@ -171,6 +171,7 @@ endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
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ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y)
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verstage-y += boot.c
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verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += gdt_init.S
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verstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
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verstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S
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@ -206,6 +207,9 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
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romstage-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c
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romstage-y += boot.c
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# gdt_init.S is included by entry32.inc when romstage is the first C
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# environment.
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romstage-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += gdt_init.S
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romstage-y += cbmem.c
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romstage-y += cbfs_and_run.c
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romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c
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@ -283,6 +287,7 @@ postcar-generic-ccopts += -D__POSTCAR__
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postcar-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c
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postcar-y += boot.c
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postcar-y += gdt_init.S
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postcar-y += cbfs_and_run.c
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postcar-y += cbmem.c
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postcar-y += cpu_common.c
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@ -20,15 +20,18 @@
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/*
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* This path is for stages that are post bootblock when employing
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* CONFIG_C_ENVIRONMENT_BOOTBLOCK. There's no need to re-load the gdt,
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* etc as all those settings are cached within the processor. In order
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* to continue with C code execution one needs to set stack pointer and
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* clear CAR_GLOBAL variables that are stage specific.
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* CONFIG_C_ENVIRONMENT_BOOTBLOCK. The gdt is reloaded to accommodate
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* platforms that are executing out of CAR. In order to continue with
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* C code execution one needs to set stack pointer and clear CAR_GLOBAL
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* variables that are stage specific.
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*/
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.section ".text._start", "ax", @progbits
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.global _start
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_start:
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/* Migrate GDT to this text segment */
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call gdt_init
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/* reset stack pointer to CAR stack */
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mov $_car_stack_end, %esp
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@ -30,6 +30,9 @@ _start:
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/* Assume stack alignment doesn't matter here as chipset_teardown_car
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is expected to be implemented in assembly. */
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/* Migrate GDT to this text segment */
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call gdt_init
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/* chipset_teardown_car() is expected to disable cache-as-ram. */
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call chipset_teardown_car
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@ -0,0 +1,43 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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.code32
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.section ".text._gdt_", "ax", @progbits
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.globl gdt_init
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gdt_init:
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lgdt %cs:gdtptr
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ret
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.previous
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.align 4
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.globl gdtptr
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gdt:
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gdtptr:
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.word gdt_end - gdt -1 /* compute the table limit */
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.long gdt /* we know the offset */
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.word 0
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/* selgdt 0x08, flat code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes
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for limit */
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/* selgdt 0x10,flat data segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x93, 0xcf, 0x00
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/* selgdt 0x18, flat code segment (64-bit) */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xaf, 0x00
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gdt_end:
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@ -16,38 +16,9 @@
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#include <arch/rom_segs.h>
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#include <cpu/x86/post_code.h>
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#include <rules.h>
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#include <arch/x86/gdt_init.S>
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.code32
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/* This is the GDT for the ROM stage part of coreboot. It
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* is different from the RAM stage GDT which is defined in
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* c_start.S
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*/
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.align 4
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.globl gdtptr
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gdt:
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gdtptr:
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.word gdt_end - gdt -1 /* compute the table limit */
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.long gdt /* we know the offset */
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.word 0
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/* selgdt 0x08, flat code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
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/* selgdt 0x10,flat data segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x93, 0xcf, 0x00
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/* selgdt 0x18, flat code segment (64-bit) */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xaf, 0x00
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gdt_end:
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/*
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* When we come here we are in protected mode. We expand
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* the stack and copies the data segment from ROM to the
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