google/reef: Configure NFC gpios correctly before entering sleep
Before entering sleep, ensure that the NFC gpios are configured correctly to avoid leakage. BUG=chrome-os-partner:56281 Change-Id: I2bb2e7ba468df445aa5f6c2b22ae0a74fcaa44f6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/16243 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -350,6 +350,12 @@ static const struct pad_config early_gpio_table[] = {
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PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */
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PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */
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};
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};
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/* GPIO settings before entering sleep. */
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static const struct pad_config sleep_gpio_table[] = {
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PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */
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PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */
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};
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/*
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/*
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* The proto boards didn't have memory SKU pins, but the same ones can be
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* The proto boards didn't have memory SKU pins, but the same ones can be
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* utilized as post proto boards because the pins used were never connected
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* utilized as post proto boards because the pins used were never connected
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@ -19,7 +19,9 @@
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#include <ec/google/chromeec/smm.h>
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#include <ec/google/chromeec/smm.h>
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#include <soc/pm.h>
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#include <soc/pm.h>
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#include <soc/smm.h>
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#include <soc/smm.h>
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#include <soc/gpio.h>
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#include "ec.h"
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#include "ec.h"
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#include "gpio.h"
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void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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{
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{
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@ -29,6 +31,8 @@ void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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void mainboard_smi_sleep(u8 slp_typ)
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void mainboard_smi_sleep(u8 slp_typ)
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{
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{
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gpio_configure_pads(sleep_gpio_table, ARRAY_SIZE(sleep_gpio_table));
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if (slp_typ == ACPI_S3)
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if (slp_typ == ACPI_S3)
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enable_gpe(GPIO_TIER_1_SCI);
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enable_gpe(GPIO_TIER_1_SCI);
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