diff --git a/src/cpu/intel/car/bootblock.c b/src/cpu/intel/car/bootblock.c new file mode 100644 index 0000000000..6bc041443e --- /dev/null +++ b/src/cpu/intel/car/bootblock.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) +{ + /* Call lib/bootblock.c main */ + bootblock_main_with_timestamp(base_timestamp, NULL, 0); +} + +void __weak bootblock_early_northbridge_init(void) { } +void __weak bootblock_early_southbridge_init(void) { } +void __weak bootblock_early_cpu_init(void) { } + +void bootblock_soc_early_init(void) +{ + bootblock_early_northbridge_init(); + bootblock_early_southbridge_init(); + bootblock_early_cpu_init(); +} + +void bootblock_soc_init(void) +{ +} diff --git a/src/cpu/intel/car/bootblock.h b/src/cpu/intel/car/bootblock.h new file mode 100644 index 0000000000..5adfd8711d --- /dev/null +++ b/src/cpu/intel/car/bootblock.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CPU_INTEL_CAR_BOOTBLOCK_H +#define _CPU_INTEL_CAR_BOOTBLOCK_H + +void bootblock_early_cpu_init(void); +void bootblock_early_northbridge_init(void); +void bootblock_early_southbridge_init(void); + +#endif diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index b9d787fdc0..2daf47b29b 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -53,6 +53,7 @@ static void romstage_main(unsigned long bist) platform_enter_postcar(); } +#if !IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK) /* This wrapper enables easy transition towards C_ENVIRONMENT_BOOTBLOCK, * keeping changes in cache_as_ram.S easy to manage. */ @@ -60,3 +61,18 @@ asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) { romstage_main(bist); } +#endif + + +/* We don't carry BIST from bootblock in a good location to read from. + * Any error should have been reported in bootblock already. + */ +#define NO_BIST 0 + +asmlinkage void car_stage_entry(void) +{ + /* Assumes the hardware was set up during the bootblock */ + console_init(); + + romstage_main(NO_BIST); +}