soc/amd/picasso: move UART console code to common folder
Change-Id: Ibc9a4c05bdfc7cd3cd0eada67563386c95d2b50e Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48515 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@ -0,0 +1,15 @@
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UART),y)
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bootblock-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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romstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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verstage_x86-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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ramstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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ifeq ($(CONFIG_DEBUG_SMI),y)
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smm-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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endif
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endif # CONFIG_SOC_AMD_COMMON_BLOCK_UART
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@ -17,7 +17,6 @@ bootblock-y += bootblock.c
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bootblock-y += early_fch.c
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bootblock-y += i2c.c
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bootblock-y += uart.c
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bootblock-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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bootblock-y += gpio.c
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bootblock-y += reset.c
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@ -27,14 +26,12 @@ romstage-y += gpio.c
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romstage-y += reset.c
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romstage-y += memmap.c
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romstage-y += uart.c
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romstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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romstage-y += psp.c
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romstage-y += mrc_cache.c
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verstage-y += i2c.c
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verstage_x86-y += gpio.c
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verstage_x86-y += uart.c
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verstage_x86-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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verstage_x86-y += reset.c
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ramstage-y += i2c.c
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@ -53,7 +50,6 @@ ramstage-y += sata.c
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ramstage-y += memmap.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
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ramstage-y += uart.c
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ramstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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ramstage-y += finalize.c
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ramstage-y += soc_util.c
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ramstage-y += psp.c
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@ -67,7 +63,6 @@ ramstage-y += dmi.c
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smm-y += smihandler.c
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ifeq ($(CONFIG_DEBUG_SMI),y)
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smm-y += uart.c
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smm-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c
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endif
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smm-y += gpio.c
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smm-y += psp.c
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