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mb/google/rex/var/screebo: Change GPP_B14 from UP_20K to NONE 

Change GPP_B14 from UP_20K to NONE for compatible
with DVT1 and DVT2 board

BUG=b:272447747
TEST=enable usb OC2 function to ensure USBA work normal

Change-Id: Ib7720980335660f423b3a74199ceedc113ec70df
Signed-off-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79431
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kun Liu 2023-12-11 11:15:28 +08:00 committed by Felix Held
parent 2d1b5c21f6
commit d3ff66d1fb
2 changed files with 13 additions and 1 deletions
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12
src/mainboard/google/rex/variants/screebo/fw_config.c
View File

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <ec/google/chromeec/ec.h>
#include <bootstate.h>
#include <console/console.h>
#include <fw_config.h>
@ -66,8 +67,19 @@ static const struct pad_config bt_i2s_disable_pads[] = {
PAD_NC(GPP_VGPIO37, NONE),
};
static const struct pad_config usb_oc2_gpio_pads[] = {
PAD_CFG_NF_LOCK(GPP_B14, UP_20K, NF1, LOCK_CONFIG),
};
void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{
uint32_t id = 0;
google_chromeec_get_board_version(&id);
if (id == 2 || id == 1) {
printk(BIOS_INFO, "Configure GPIOs for evt and dvt1.\n");
GPIO_PADBASED_OVERRIDE(padbased_table, usb_oc2_gpio_pads);
}
if (!fw_config_is_provisioned()) {
GPIO_PADBASED_OVERRIDE(padbased_table, i2s_disable_pads);
GPIO_PADBASED_OVERRIDE(padbased_table, dmic_disable_pads);

2
src/mainboard/google/rex/variants/screebo/gpio.c
View File

@ -76,7 +76,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_B13 : [] ==> PLT_RST_L */
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
/* GPP_B14 : GPP_B14_STRAP ==> USB_OC2 */
PAD_CFG_NF_LOCK(GPP_B14, UP_20K, NF1, LOCK_CONFIG),
PAD_CFG_NF_LOCK(GPP_B14, NONE, NF1, LOCK_CONFIG),
/* GPP_B15 : [] ==> USB_OC3# */
PAD_CFG_NF_LOCK(GPP_B15, NONE, NF1, LOCK_CONFIG),
/* GPP_B16 : [] ==> SOC_HDMI_HPD_L */