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src/soc/intel/{common,cnl,skl,icl}: Move global reset req function to common 

send_heci_reset_req_message() is defined in multiple places,
hence move it to common code.

TEST=Verified on CMLRVP/Hatch/Soraka/Bobba/Dragon Egg boards.

Change-Id: I691fc0610356ef1f64ffa7cc4fe7a39b1344cc16
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35228
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sridhar Siricilla 2019-08-31 14:54:57 +05:30 committed by Patrick Georgi
parent 198f427907
commit d415c206b5
6 changed files with 78 additions and 171 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

57
src/soc/intel/cannonlake/reset.c
View File

@ -22,65 +22,10 @@
#include <string.h>
#include <soc/pci_devs.h>
/* Reset Request */
#define MKHI_GLOBAL_RESET 0x0b
#define MKHI_STATUS_SUCCESS 0
#define GR_ORIGIN_BIOS_MEM_INIT 0x01
#define GR_ORIGIN_BIOS_POST 0x02
#define GR_ORIGIN_MEBX 0x03
#define GLOBAL_RST_TYPE 0x01
#define BIOS_HOST_ADD 0x00
#define HECI_MKHI_ADD 0x07
static int send_heci_reset_message(void)
{
int status;
struct reset_reply {
u8 group_id;
u8 command;
u8 reserved;
u8 result;
} __packed reply;
struct reset_message {
u8 group_id;
u8 cmd;
u8 reserved;
u8 result;
u8 req_origin;
u8 reset_type;
} __packed;
struct reset_message msg = {
.cmd = MKHI_GLOBAL_RESET,
.req_origin = GR_ORIGIN_BIOS_POST,
.reset_type = GLOBAL_RST_TYPE
};
size_t reply_size;
heci_reset();
status = heci_send(&msg, sizeof(msg), BIOS_HOST_ADD, HECI_MKHI_ADD);
if (status != 1)
return -1;
reply_size = sizeof(reply);
memset(&reply, 0, reply_size);
if (!heci_receive(&reply, &reply_size))
return -1;
if (reply.result != MKHI_STATUS_SUCCESS) {
printk(BIOS_DEBUG, "Returned Mkhi Status is not success!\n");
return -1;
}
printk(BIOS_DEBUG, "Heci receive success!\n");
return 0;
}
void do_global_reset(void)
{
/* Ask CSE to do the global reset */
if (!send_heci_reset_message())
if (!send_heci_reset_req_message(GLOBAL_RESET))
return;
/* global reset if CSE fail to reset */

61
src/soc/intel/common/block/cse/cse.c
View File

@ -69,10 +69,25 @@
#define HECI_OP_MODE_SEC_OVERRIDE 5
/* Global Reset Command ID */
#define MKHI_GLOBAL_RESET_REQ 0xb
#define MKHI_GROUP_ID_CBM 0
/* RST Origin */
#define GR_ORIGIN_BIOS_POST 2
static struct cse_device {
uintptr_t sec_bar;
} g_cse;
/* HECI Message Header */
struct mkhi_hdr {
uint8_t group_id;
uint8_t command:7;
uint8_t is_resp:1;
uint8_t rsvd;
uint8_t result;
} __packed;
/*
* Initialize the device with provided temporary BAR. If BAR is 0 use a
* default. This is intended for pre-mem usage only where BARs haven't been
@ -558,6 +573,52 @@ uint32_t me_read_config32(int offset)
return pci_read_config32(PCH_DEV_CSE, offset);
}
/*
* Sends GLOBAL_RESET_REQ cmd to CSE.The reset type can be GLOBAL_RESET/
* HOST_RESET_ONLY/CSE_RESET_ONLY.
*/
int send_heci_reset_req_message(uint8_t rst_type)
{
int status;
struct mkhi_hdr reply;
struct reset_message {
struct mkhi_hdr hdr;
uint8_t req_origin;
uint8_t reset_type;
} __packed;
struct reset_message msg = {
.hdr = {
.group_id = MKHI_GROUP_ID_CBM,
.command = MKHI_GLOBAL_RESET_REQ,
},
.req_origin = GR_ORIGIN_BIOS_POST,
.reset_type = rst_type
};
size_t reply_size;
if (!((rst_type == GLOBAL_RESET) ||
(rst_type == HOST_RESET_ONLY) || (rst_type == CSE_RESET_ONLY)))
return -1;
heci_reset();
reply_size = sizeof(reply);
memset(&reply, 0, reply_size);
printk(BIOS_DEBUG, "HECI: Global Reset(Type:%d) Command\n", rst_type);
if (rst_type == CSE_RESET_ONLY)
status = heci_send_receive(&msg, sizeof(msg), NULL, 0);
else
status = heci_send_receive(&msg, sizeof(msg), &reply,
&reply_size);
if (status != 1)
return -1;
printk(BIOS_DEBUG, "HECI: Global Reset success!\n");
return 0;
}
#if ENV_RAMSTAGE
static void update_sec_bar(struct device *dev)

12
src/soc/intel/common/block/include/intelblocks/cse.h
View File

@ -106,7 +106,19 @@ void set_host_ready(void);
*/
uint8_t wait_cse_sec_override_mode(void);
/*
* Sends GLOBAL_RESET_REQ cmd to CSE.The reset type can be
* GLOBAL_RESET/HOST_RESET_ONLY/CSE_RESET_ONLY.
* Returns -1 on failure a 0 on success.
*/
int send_heci_reset_req_message(uint8_t rst_type);
#define BIOS_HOST_ADDR 0x00
#define HECI_MKHI_ADDR 0x07
/* Command GLOBAL_RESET_REQ Reset Types */
#define GLOBAL_RESET 1
#define HOST_RESET_ONLY 2
#define CSE_RESET_ONLY 3
#endif // SOC_INTEL_COMMON_MSR_H

57
src/soc/intel/icelake/reset.c
View File

@ -22,65 +22,10 @@
#include <string.h>
#include <soc/pci_devs.h>
/* Reset Request */
#define MKHI_GLOBAL_RESET 0x0b
#define MKHI_STATUS_SUCCESS 0
#define GR_ORIGIN_BIOS_MEM_INIT 0x01
#define GR_ORIGIN_BIOS_POST 0x02
#define GR_ORIGIN_MEBX 0x03
#define GLOBAL_RST_TYPE 0x01
#define BIOS_HOST_ADD 0x00
#define HECI_MKHI_ADD 0x07
static int send_heci_reset_message(void)
{
int status;
struct reset_reply {
u8 group_id;
u8 command;
u8 reserved;
u8 result;
} __packed reply;
struct reset_message {
u8 group_id;
u8 cmd;
u8 reserved;
u8 result;
u8 req_origin;
u8 reset_type;
} __packed;
struct reset_message msg = {
.cmd = MKHI_GLOBAL_RESET,
.req_origin = GR_ORIGIN_BIOS_POST,
.reset_type = GLOBAL_RST_TYPE
};
size_t reply_size;
heci_reset();
status = heci_send(&msg, sizeof(msg), BIOS_HOST_ADD, HECI_MKHI_ADD);
if (status != 1)
return -1;
reply_size = sizeof(reply);
memset(&reply, 0, reply_size);
if (!heci_receive(&reply, &reply_size))
return -1;
if (reply.result != MKHI_STATUS_SUCCESS) {
printk(BIOS_DEBUG, "Returned Mkhi Status is not success!\n");
return -1;
}
printk(BIOS_DEBUG, "Heci receive success!\n");
return 0;
}
void do_global_reset(void)
{
/* Ask CSE to do the global reset */
if (!send_heci_reset_message())
if (!send_heci_reset_req_message(GLOBAL_RESET))
return;
/* global reset if CSE fail to reset */

12
src/soc/intel/skylake/include/soc/me.h
View File

@ -173,20 +173,8 @@ union me_hfs6 {
#define MKHI_GEN_GROUP_ID 0xff
/* Reset Request */
#define MKHI_GLOBAL_RESET 0x0b
#define MKHI_GET_FW_VERSION 0x02
#define GR_ORIGIN_BIOS_MEM_INIT 0x01
#define GR_ORIGIN_BIOS_POST 0x02
#define GR_ORIGIN_MEBX 0x03
#define GLOBAL_RST_TYPE 0x01
#define BIOS_HOST_ADD 0x00
#define HECI_MKHI_ADD 0x07
void intel_me_status(void);
int send_global_reset(void);

50
src/soc/intel/skylake/me.c
View File

@ -257,8 +257,8 @@ static void print_me_version(void *unused)
*/
heci_reset();
if (!heci_send(&fw_ver_msg, sizeof(fw_ver_msg), BIOS_HOST_ADD,
HECI_MKHI_ADD))
if (!heci_send(&fw_ver_msg, sizeof(fw_ver_msg), BIOS_HOST_ADDR,
HECI_MKHI_ADDR))
goto failed;
if (!heci_receive(&resp, &resp_size))
@ -437,50 +437,6 @@ void intel_me_status(void)
}
}
static int send_heci_reset_message(void)
{
int status;
struct reset_reply {
u8 group_id;
u8 command;
u8 reserved;
u8 result;
} __packed reply;
struct reset_message {
u8 group_id;
u8 cmd;
u8 reserved;
u8 result;
u8 req_origin;
u8 reset_type;
} __packed;
struct reset_message msg = {
.cmd = MKHI_GLOBAL_RESET,
.req_origin = GR_ORIGIN_BIOS_POST,
.reset_type = GLOBAL_RST_TYPE
};
size_t reply_size;
heci_reset();
status = heci_send(&msg, sizeof(msg), BIOS_HOST_ADD, HECI_MKHI_ADD);
if (!status)
return -1;
reply_size = sizeof(reply);
memset(&reply, 0, reply_size);
status = heci_receive(&reply, &reply_size);
if (!status)
return -1;
/* get reply result from HECI MSG */
if (reply.result) {
printk(BIOS_DEBUG, "%s: Exit with Failure\n", __func__);
return -1;
}
printk(BIOS_DEBUG, "%s: Exit with Success\n", __func__);
return 0;
}
int send_global_reset(void)
{
int status = -1;
@ -495,7 +451,7 @@ int send_global_reset(void)
goto ret;
/* ME should be in Normal Mode for this command */
status = send_heci_reset_message();
status = send_heci_reset_req_message(GLOBAL_RESET);
ret:
return status;
}