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Cosmetics and coding style fixes in devices/*. 

- Whitespace and indentation fixes in various places.
 
 - Fix various typos.
 
 - Use u8, u16 etc. everywhere.

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2010-10-18 00:00:57 +00:00
parent a600a3f700
commit d453dd0c4d
10 changed files with 260 additions and 222 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

91
src/devices/cardbus_device.c
View File

@ -25,28 +25,30 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/cardbus.h> #include <device/cardbus.h>
/* I don't think this code is quite correct but it is close. /*
* I don't think this code is quite correct but it is close.
* Anyone with a cardbus bridge and a little time should be able * Anyone with a cardbus bridge and a little time should be able
* to make it usable quickly. -- Eric Biederman 24 March 2005 * to make it usable quickly. -- Eric Biederman 24 March 2005
*/ */
/* /*
* IO should be max 256 bytes. However, since we may * IO should be max 256 bytes. However, since we may have a P2P bridge below
* have a P2P bridge below a cardbus bridge, we need 4K. * a cardbus bridge, we need 4K.
*/ */
#define CARDBUS_IO_SIZE (4096) #define CARDBUS_IO_SIZE 4096
#define CARDBUS_MEM_SIZE (32*1024*1024) #define CARDBUS_MEM_SIZE (32 * 1024 * 1024)
static void cardbus_record_bridge_resource( static void cardbus_record_bridge_resource(device_t dev, resource_t moving,
device_t dev, resource_t moving, resource_t min_size, resource_t min_size, unsigned int index, unsigned long type)
unsigned index, unsigned long type)
{ {
/* Initialize the constraints on the current bus. */
struct resource *resource; struct resource *resource;
/* Initialize the constraints on the current bus. */
resource = NULL; resource = NULL;
if (moving) { if (moving) {
unsigned long gran; unsigned long gran;
resource_t step; resource_t step;
resource = new_resource(dev, index); resource = new_resource(dev, index);
resource->size = 0; resource->size = 0;
gran = 0; gran = 0;
@ -59,30 +61,33 @@ static void cardbus_record_bridge_resource(
resource->align = gran; resource->align = gran;
resource->limit = moving | (step - 1); resource->limit = moving | (step - 1);
resource->flags = type; resource->flags = type;
/* Don't let the minimum size exceed what we
/*
* Don't let the minimum size exceed what we
* can put in the resource. * can put in the resource.
*/ */
if ((min_size - 1) > resource->limit) { if ((min_size - 1) > resource->limit)
min_size = resource->limit + 1; min_size = resource->limit + 1;
}
resource->size = min_size; resource->size = min_size;
} }
return; return;
} }
static void cardbus_size_bridge_resource(device_t dev, unsigned index) static void cardbus_size_bridge_resource(device_t dev, unsigned int index)
{ {
struct resource *resource; struct resource *resource;
resource_t min_size; resource_t min_size;
resource = find_resource(dev, index); resource = find_resource(dev, index);
if (resource) { if (resource) {
min_size = resource->size; min_size = resource->size;
/* Allways allocate at least the miniumum size to a /*
* Always allocate at least the miniumum size to a
* cardbus bridge in case a new card is plugged in. * cardbus bridge in case a new card is plugged in.
*/ */
if (resource->size < min_size) { if (resource->size < min_size)
resource->size = min_size; resource->size = min_size;
}
} }
} }
@ -90,34 +95,34 @@ void cardbus_read_resources(device_t dev)
{ {
resource_t moving_base, moving_limit, moving; resource_t moving_base, moving_limit, moving;
unsigned long type; unsigned long type;
uint16_t ctl; u16 ctl;
/* See if needs a card control registers base address */ /* See if needs a card control registers base address. */
pci_get_resource(dev, PCI_BASE_ADDRESS_0); pci_get_resource(dev, PCI_BASE_ADDRESS_0);
compact_resources(dev); compact_resources(dev);
/* See which bridge I/O resources are implemented */ /* See which bridge I/O resources are implemented. */
moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_0); moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_0);
moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_0); moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_0);
moving = moving_base & moving_limit; moving = moving_base & moving_limit;
/* Initialize the io space constraints on the current bus */ /* Initialize the I/O space constraints on the current bus. */
cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE, cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE,
PCI_CB_IO_BASE_0, IORESOURCE_IO); PCI_CB_IO_BASE_0, IORESOURCE_IO);
cardbus_size_bridge_resource(dev, PCI_CB_IO_BASE_0); cardbus_size_bridge_resource(dev, PCI_CB_IO_BASE_0);
/* See which bridge I/O resources are implemented */ /* See which bridge I/O resources are implemented. */
moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_1); moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_1);
moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_1); moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_1);
moving = moving_base & moving_limit; moving = moving_base & moving_limit;
/* Initialize the io space constraints on the current bus */ /* Initialize the I/O space constraints on the current bus. */
cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE, cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE,
PCI_CB_IO_BASE_1, IORESOURCE_IO); PCI_CB_IO_BASE_1, IORESOURCE_IO);
/* If I can enable prefetch for mem0 */ /* If I can, enable prefetch for mem0. */
ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL); ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
@ -125,30 +130,28 @@ void cardbus_read_resources(device_t dev)
pci_write_config16(dev, PCI_CB_BRIDGE_CONTROL, ctl); pci_write_config16(dev, PCI_CB_BRIDGE_CONTROL, ctl);
ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL); ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
/* See which bridge memory resources are implemented */ /* See which bridge memory resources are implemented. */
moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_0); moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_0);
moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_0); moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_0);
moving = moving_base & moving_limit; moving = moving_base & moving_limit;
/* Initialize the memory space constraints on the current bus */ /* Initialize the memory space constraints on the current bus. */
type = IORESOURCE_MEM; type = IORESOURCE_MEM;
if (ctl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { if (ctl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)
type |= IORESOURCE_PREFETCH; type |= IORESOURCE_PREFETCH;
}
cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE, cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE,
PCI_CB_MEMORY_BASE_0, type); PCI_CB_MEMORY_BASE_0, type);
if (type & IORESOURCE_PREFETCH) { if (type & IORESOURCE_PREFETCH)
cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_0); cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_0);
}
/* See which bridge memory resources are implemented */ /* See which bridge memory resources are implemented. */
moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_1); moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_1);
moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_1); moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_1);
moving = moving_base & moving_limit; moving = moving_base & moving_limit;
/* Initialize the memory space constraints on the current bus */ /* Initialize the memory space constraints on the current bus. */
cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE, cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE,
PCI_CB_MEMORY_BASE_1, IORESOURCE_MEM); PCI_CB_MEMORY_BASE_1, IORESOURCE_MEM);
cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_1); cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_1);
compact_resources(dev); compact_resources(dev);
@ -156,7 +159,8 @@ void cardbus_read_resources(device_t dev)
void cardbus_enable_resources(device_t dev) void cardbus_enable_resources(device_t dev)
{ {
uint16_t ctrl; u16 ctrl;
ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL); ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
ctrl |= (dev->link_list->bridge_ctrl & ( ctrl |= (dev->link_list->bridge_ctrl & (
PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_PARITY |
@ -165,7 +169,8 @@ void cardbus_enable_resources(device_t dev)
PCI_BRIDGE_CTL_VGA | PCI_BRIDGE_CTL_VGA |
PCI_BRIDGE_CTL_MASTER_ABORT | PCI_BRIDGE_CTL_MASTER_ABORT |
PCI_BRIDGE_CTL_BUS_RESET)); PCI_BRIDGE_CTL_BUS_RESET));
ctrl |= (PCI_CB_BRIDGE_CTL_PARITY + PCI_CB_BRIDGE_CTL_SERR); /* error check */ /* Error check */
ctrl |= (PCI_CB_BRIDGE_CTL_PARITY + PCI_CB_BRIDGE_CTL_SERR);
printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
@ -176,8 +181,8 @@ struct device_operations default_cardbus_ops_bus = {
.read_resources = cardbus_read_resources, .read_resources = cardbus_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,
.enable_resources = cardbus_enable_resources, .enable_resources = cardbus_enable_resources,
.init = 0, .init = 0,
.scan_bus = pci_scan_bridge, .scan_bus = pci_scan_bridge,
.enable = 0, .enable = 0,
.reset_bus = pci_bus_reset, .reset_bus = pci_bus_reset,
}; };

25
src/devices/pciexp_device.c
View File

@ -26,13 +26,12 @@
static void pciexp_tune_dev(device_t dev) static void pciexp_tune_dev(device_t dev)
{ {
unsigned cap; unsigned int cap;
cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
if (!cap) { if (!cap)
/* error... */
return; return;
}
#ifdef CONFIG_PCIE_TUNING #ifdef CONFIG_PCIE_TUNING
printk(BIOS_DEBUG, "PCIe: tuning %s\n", dev_path(dev)); printk(BIOS_DEBUG, "PCIe: tuning %s\n", dev_path(dev));
@ -45,16 +44,16 @@ static void pciexp_tune_dev(device_t dev)
#endif #endif
} }
unsigned int pciexp_scan_bus(struct bus *bus, unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
unsigned min_devfn, unsigned max_devfn, unsigned int max_devfn, unsigned int max)
unsigned int max)
{ {
device_t child; device_t child;
max = pci_scan_bus(bus, min_devfn, max_devfn, max); max = pci_scan_bus(bus, min_devfn, max_devfn, max);
for(child = bus->children; child; child = child->sibling) {
if ( (child->path.pci.devfn < min_devfn) || for (child = bus->children; child; child = child->sibling) {
(child->path.pci.devfn > max_devfn)) if ((child->path.pci.devfn < min_devfn) ||
{ (child->path.pci.devfn > max_devfn)) {
continue; continue;
} }
pciexp_tune_dev(child); pciexp_tune_dev(child);
@ -76,8 +75,8 @@ struct device_operations default_pciexp_ops_bus = {
.read_resources = pci_bus_read_resources, .read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources, .enable_resources = pci_bus_enable_resources,
.init = 0, .init = 0,
.scan_bus = pciexp_scan_bridge, .scan_bus = pciexp_scan_bridge,
.enable = 0, .enable = 0,
.reset_bus = pci_bus_reset, .reset_bus = pci_bus_reset,
.ops_pci = &pciexp_bus_ops_pci, .ops_pci = &pciexp_bus_ops_pci,

59
src/devices/pcix_device.c
View File

@ -26,20 +26,21 @@
static void pcix_tune_dev(device_t dev) static void pcix_tune_dev(device_t dev)
{ {
unsigned cap; u32 status;
unsigned status, orig_cmd, cmd; u16 orig_cmd, cmd;
unsigned max_read, max_tran; unsigned int cap, max_read, max_tran;
if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL) { if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL)
return; return;
}
cap = pci_find_capability(dev, PCI_CAP_ID_PCIX); cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
if (!cap) { if (!cap)
return; return;
}
printk(BIOS_DEBUG, "%s PCI-X tuning\n", dev_path(dev)); printk(BIOS_DEBUG, "%s PCI-X tuning\n", dev_path(dev));
status = pci_read_config32(dev, cap + PCI_X_STATUS); status = pci_read_config32(dev, cap + PCI_X_STATUS);
orig_cmd = cmd = pci_read_config16(dev,cap + PCI_X_CMD); orig_cmd = cmd = pci_read_config16(dev, cap + PCI_X_CMD);
max_read = (status & PCI_X_STATUS_MAX_READ) >> 21; max_read = (status & PCI_X_STATUS_MAX_READ) >> 21;
max_tran = (status & PCI_X_STATUS_MAX_SPLIT) >> 23; max_tran = (status & PCI_X_STATUS_MAX_SPLIT) >> 23;
@ -51,23 +52,26 @@ static void pcix_tune_dev(device_t dev)
cmd &= ~PCI_X_CMD_MAX_SPLIT; cmd &= ~PCI_X_CMD_MAX_SPLIT;
cmd |= max_tran << 4; cmd |= max_tran << 4;
} }
/* Don't attempt to handle PCI-X errors */
/* Don't attempt to handle PCI-X errors. */
cmd &= ~PCI_X_CMD_DPERR_E; cmd &= ~PCI_X_CMD_DPERR_E;
/* Enable Relaxed Ordering */
/* Enable Relaxed Ordering. */
cmd |= PCI_X_CMD_ERO; cmd |= PCI_X_CMD_ERO;
if (orig_cmd != cmd) {
if (orig_cmd != cmd)
pci_write_config16(dev, cap + PCI_X_CMD, cmd); pci_write_config16(dev, cap + PCI_X_CMD, cmd);
}
} }
static void pcix_tune_bus(struct bus *bus) static void pcix_tune_bus(struct bus *bus)
{ {
device_t child; device_t child;
for(child = bus->children; child; child = child->sibling)
for (child = bus->children; child; child = child->sibling)
pcix_tune_dev(child); pcix_tune_dev(child);
} }
const char *pcix_speed(unsigned sstatus) const char *pcix_speed(u16 sstatus)
{ {
static const char conventional[] = "Conventional PCI"; static const char conventional[] = "Conventional PCI";
static const char pcix_66mhz[] = "66MHz PCI-X"; static const char pcix_66mhz[] = "66MHz PCI-X";
@ -76,10 +80,11 @@ const char *pcix_speed(unsigned sstatus)
static const char pcix_266mhz[] = "266MHz PCI-X"; static const char pcix_266mhz[] = "266MHz PCI-X";
static const char pcix_533mhz[] = "533MHZ PCI-X"; static const char pcix_533mhz[] = "533MHZ PCI-X";
static const char unknown[] = "Unknown"; static const char unknown[] = "Unknown";
const char *result; const char *result;
result = unknown; result = unknown;
switch(PCI_X_SSTATUS_MFREQ(sstatus)) {
switch (PCI_X_SSTATUS_MFREQ(sstatus)) {
case PCI_X_SSTATUS_CONVENTIONAL_PCI: case PCI_X_SSTATUS_CONVENTIONAL_PCI:
result = conventional; result = conventional;
break; break;
@ -89,17 +94,14 @@ const char *pcix_speed(unsigned sstatus)
case PCI_X_SSTATUS_MODE1_100MHZ: case PCI_X_SSTATUS_MODE1_100MHZ:
result = pcix_100mhz; result = pcix_100mhz;
break; break;
case PCI_X_SSTATUS_MODE1_133MHZ: case PCI_X_SSTATUS_MODE1_133MHZ:
result = pcix_133mhz; result = pcix_133mhz;
break; break;
case PCI_X_SSTATUS_MODE2_266MHZ_REF_66MHZ: case PCI_X_SSTATUS_MODE2_266MHZ_REF_66MHZ:
case PCI_X_SSTATUS_MODE2_266MHZ_REF_100MHZ: case PCI_X_SSTATUS_MODE2_266MHZ_REF_100MHZ:
case PCI_X_SSTATUS_MODE2_266MHZ_REF_133MHZ: case PCI_X_SSTATUS_MODE2_266MHZ_REF_133MHZ:
result = pcix_266mhz; result = pcix_266mhz;
break; break;
case PCI_X_SSTATUS_MODE2_533MHZ_REF_66MHZ: case PCI_X_SSTATUS_MODE2_533MHZ_REF_66MHZ:
case PCI_X_SSTATUS_MODE2_533MHZ_REF_100MHZ: case PCI_X_SSTATUS_MODE2_533MHZ_REF_100MHZ:
case PCI_X_SSTATUS_MODE2_533MHZ_REF_133MHZ: case PCI_X_SSTATUS_MODE2_533MHZ_REF_133MHZ:
@ -111,20 +113,21 @@ const char *pcix_speed(unsigned sstatus)
unsigned int pcix_scan_bridge(device_t dev, unsigned int max) unsigned int pcix_scan_bridge(device_t dev, unsigned int max)
{ {
unsigned pos; unsigned int pos;
unsigned sstatus; u16 sstatus;
max = do_pci_scan_bridge(dev, max, pci_scan_bus); max = do_pci_scan_bridge(dev, max, pci_scan_bus);
/* Find the PCI-X capability */
/* Find the PCI-X capability. */
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
sstatus = pci_read_config16(dev, pos + PCI_X_SEC_STATUS); sstatus = pci_read_config16(dev, pos + PCI_X_SEC_STATUS);
if (PCI_X_SSTATUS_MFREQ(sstatus) != PCI_X_SSTATUS_CONVENTIONAL_PCI) { if (PCI_X_SSTATUS_MFREQ(sstatus) != PCI_X_SSTATUS_CONVENTIONAL_PCI)
pcix_tune_bus(dev->link_list); pcix_tune_bus(dev->link_list);
}
/* Print the PCI-X bus speed */ /* Print the PCI-X bus speed. */
printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary, pcix_speed(sstatus)); printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary,
pcix_speed(sstatus));
return max; return max;
} }
@ -138,8 +141,8 @@ struct device_operations default_pcix_ops_bus = {
.read_resources = pci_bus_read_resources, .read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources, .enable_resources = pci_bus_enable_resources,
.init = 0, .init = 0,
.scan_bus = pcix_scan_bridge, .scan_bus = pcix_scan_bridge,
.enable = 0, .enable = 0,
.reset_bus = pci_bus_reset, .reset_bus = pci_bus_reset,
.ops_pci = &pcix_bus_ops_pci, .ops_pci = &pcix_bus_ops_pci,

105
src/devices/pnp_device.c
View File

@ -32,13 +32,13 @@
/* PNP fundamental operations */ /* PNP fundamental operations */
void pnp_write_config(device_t dev, uint8_t reg, uint8_t value) void pnp_write_config(device_t dev, u8 reg, u8 value)
{ {
outb(reg, dev->path.pnp.port); outb(reg, dev->path.pnp.port);
outb(value, dev->path.pnp.port + 1); outb(value, dev->path.pnp.port + 1);
} }
uint8_t pnp_read_config(device_t dev, uint8_t reg) u8 pnp_read_config(device_t dev, u8 reg)
{ {
outb(reg, dev->path.pnp.port); outb(reg, dev->path.pnp.port);
return inb(dev->path.pnp.port + 1); return inb(dev->path.pnp.port + 1);
@ -51,45 +51,49 @@ void pnp_set_logical_device(device_t dev)
void pnp_set_enable(device_t dev, int enable) void pnp_set_enable(device_t dev, int enable)
{ {
uint8_t tmp, bitpos; u8 tmp, bitpos;
tmp = pnp_read_config(dev, 0x30); tmp = pnp_read_config(dev, 0x30);
/* handle the virtual devices, which share same LDN register */
/* Handle virtual devices, which share the same LDN register. */
bitpos = (dev->path.pnp.device >> 8) & 0x7; bitpos = (dev->path.pnp.device >> 8) & 0x7;
if (enable) { if (enable)
tmp |= (1 << bitpos); tmp |= (1 << bitpos);
} else { else
tmp &= ~(1 << bitpos); tmp &= ~(1 << bitpos);
}
pnp_write_config(dev, 0x30, tmp); pnp_write_config(dev, 0x30, tmp);
} }
int pnp_read_enable(device_t dev) int pnp_read_enable(device_t dev)
{ {
uint8_t tmp, bitpos; u8 tmp, bitpos;
tmp = pnp_read_config(dev, 0x30); tmp = pnp_read_config(dev, 0x30);
/* handle the virtual devices, which share same LDN register */
/* Handle virtual devices, which share the same LDN register. */
bitpos = (dev->path.pnp.device >> 8) & 0x7; bitpos = (dev->path.pnp.device >> 8) & 0x7;
return !!(tmp & (1 << bitpos)); return !!(tmp & (1 << bitpos));
} }
void pnp_set_iobase(device_t dev, unsigned index, unsigned iobase) void pnp_set_iobase(device_t dev, u8 index, u16 iobase)
{ {
/* Index == 0x60 or 0x62 */ /* Index == 0x60 or 0x62. */
pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff); pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
pnp_write_config(dev, index + 1, iobase & 0xff); pnp_write_config(dev, index + 1, iobase & 0xff);
} }
void pnp_set_irq(device_t dev, unsigned index, unsigned irq) void pnp_set_irq(device_t dev, u8 index, u8 irq)
{ {
/* Index == 0x70 or 0x72 */ /* Index == 0x70 or 0x72. */
pnp_write_config(dev, index, irq); pnp_write_config(dev, index, irq);
} }
void pnp_set_drq(device_t dev, unsigned index, unsigned drq) void pnp_set_drq(device_t dev, u8 index, u8 drq)
{ {
/* Index == 0x74 */ /* Index == 0x74. */
pnp_write_config(dev, index, drq & 0xff); pnp_write_config(dev, index, drq & 0xff);
} }
@ -103,26 +107,22 @@ void pnp_read_resources(device_t dev)
static void pnp_set_resource(device_t dev, struct resource *resource) static void pnp_set_resource(device_t dev, struct resource *resource)
{ {
if (!(resource->flags & IORESOURCE_ASSIGNED)) { if (!(resource->flags & IORESOURCE_ASSIGNED)) {
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010Lx not assigned\n", printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010Lx "
dev_path(dev), resource->index, "not assigned\n", dev_path(dev), resource->index,
resource_type(resource), resource_type(resource), resource->size);
resource->size);
return; return;
} }
/* Now store the resource */ /* Now store the resource. */
if (resource->flags & IORESOURCE_IO) { if (resource->flags & IORESOURCE_IO) {
pnp_set_iobase(dev, resource->index, resource->base); pnp_set_iobase(dev, resource->index, resource->base);
} } else if (resource->flags & IORESOURCE_DRQ) {
else if (resource->flags & IORESOURCE_DRQ) {
pnp_set_drq(dev, resource->index, resource->base); pnp_set_drq(dev, resource->index, resource->base);
} } else if (resource->flags & IORESOURCE_IRQ) {
else if (resource->flags & IORESOURCE_IRQ) {
pnp_set_irq(dev, resource->index, resource->base); pnp_set_irq(dev, resource->index, resource->base);
} } else {
else {
printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n", printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
dev_path(dev), resource->index); dev_path(dev), resource->index);
return; return;
} }
resource->flags |= IORESOURCE_STORED; resource->flags |= IORESOURCE_STORED;
@ -134,13 +134,12 @@ void pnp_set_resources(device_t dev)
{ {
struct resource *res; struct resource *res;
/* Select the device */ /* Select the logical device (LDN). */
pnp_set_logical_device(dev); pnp_set_logical_device(dev);
/* Paranoia says I should disable the device here... */ /* Paranoia says I should disable the device here... */
for(res = dev->resource_list; res; res = res->next) { for (res = dev->resource_list; res; res = res->next)
pnp_set_resource(dev, res); pnp_set_resource(dev, res);
}
} }
void pnp_enable_resources(device_t dev) void pnp_enable_resources(device_t dev)
@ -166,39 +165,45 @@ struct device_operations pnp_ops = {
/* PNP chip opertations */ /* PNP chip opertations */
static void pnp_get_ioresource(device_t dev, unsigned index, struct io_info *info) static void pnp_get_ioresource(device_t dev, u8 index, struct io_info *info)
{ {
struct resource *resource; struct resource *resource;
unsigned moving, gran, step; unsigned moving, gran, step;
resource = new_resource(dev, index); resource = new_resource(dev, index);
/* Initilize the resource */ /* Initilize the resource. */
resource->limit = 0xffff; resource->limit = 0xffff;
resource->flags |= IORESOURCE_IO; resource->flags |= IORESOURCE_IO;
/* Get the resource size */ /* Get the resource size... */
moving = info->mask; moving = info->mask;
gran = 15; gran = 15;
step = 1 << gran; step = 1 << gran;
/* Find the first bit that moves */
while((moving & step) == 0) { /* Find the first bit that moves. */
while ((moving & step) == 0) {
gran--; gran--;
step >>= 1; step >>= 1;
} }
/* Now find the first bit that does not move */
while((moving & step) != 0) { /* Now find the first bit that does not move. */
while ((moving & step) != 0) {
gran--; gran--;
step >>= 1; step >>= 1;
} }
/* Of the moving bits the last bit in the first group,
/*
* Of the moving bits the last bit in the first group,
* tells us the size of this resource. * tells us the size of this resource.
*/ */
if ((moving & step) == 0) { if ((moving & step) == 0) {
gran++; gran++;
step <<= 1; step <<= 1;
} }
/* Set the resource size and alignment */
/* Set the resource size and alignment. */
resource->gran = gran; resource->gran = gran;
resource->align = gran; resource->align = gran;
resource->limit = info->mask | (step - 1); resource->limit = info->mask | (step - 1);
@ -241,8 +246,10 @@ static void get_resources(device_t dev, struct pnp_info *info)
resource->size = 1; resource->size = 1;
resource->flags |= IORESOURCE_DRQ; resource->flags |= IORESOURCE_DRQ;
} }
/* These are not IRQs, but set the flag to have the
* resource allocator do the right thing /*
* These are not IRQs, but set the flag to have the
* resource allocator do the right thing.
*/ */
if (info->flags & PNP_EN) { if (info->flags & PNP_EN) {
resource = new_resource(dev, PNP_IDX_EN); resource = new_resource(dev, PNP_IDX_EN);
@ -262,17 +269,17 @@ static void get_resources(device_t dev, struct pnp_info *info)
} }
void pnp_enable_devices(device_t base_dev, struct device_operations *ops, void pnp_enable_devices(device_t base_dev, struct device_operations *ops,
unsigned functions, struct pnp_info *info) unsigned int functions, struct pnp_info *info)
{ {
struct device_path path; struct device_path path;
device_t dev; device_t dev;
int i; int i;
path.type = DEVICE_PATH_PNP; path.type = DEVICE_PATH_PNP;
path.pnp.port = base_dev->path.pnp.port; path.pnp.port = base_dev->path.pnp.port;
/* Setup the ops and resources on the newly allocated devices */ /* Setup the ops and resources on the newly allocated devices. */
for(i = 0; i < functions; i++) { for (i = 0; i < functions; i++) {
/* Skip logical devices this Super I/O doesn't have. */ /* Skip logical devices this Super I/O doesn't have. */
if (info[i].function == -1) if (info[i].function == -1)
continue; continue;
@ -280,15 +287,15 @@ void pnp_enable_devices(device_t base_dev, struct device_operations *ops,
path.pnp.device = info[i].function; path.pnp.device = info[i].function;
dev = alloc_find_dev(base_dev->bus, &path); dev = alloc_find_dev(base_dev->bus, &path);
/* Don't initialize a device multiple times */ /* Don't initialize a device multiple times. */
if (dev->ops) if (dev->ops)
continue; continue;
if (info[i].ops == 0) { if (info[i].ops == 0)
dev->ops = ops; dev->ops = ops;
} else { else
dev->ops = info[i].ops; dev->ops = info[i].ops;
}
get_resources(dev, &info[i]); get_resources(dev, &info[i]);
} }
} }

44
src/devices/root_device.c
View File

@ -71,40 +71,42 @@ static void root_dev_set_resources(device_t root)
* *
* @param bus Pointer to the device to which the static buses are attached to. * @param bus Pointer to the device to which the static buses are attached to.
* @param max Maximum bus number currently used before scanning. * @param max Maximum bus number currently used before scanning.
* @return Largest bus number used. * @return The largest bus number used.
*/ */
static int smbus_max = 0; static int smbus_max = 0;
unsigned int scan_static_bus(device_t bus, unsigned int max) unsigned int scan_static_bus(device_t bus, unsigned int max)
{ {
device_t child; device_t child;
struct bus* link; struct bus *link;
printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus)); printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
for(link = bus->link_list; link; link = link->next) { for (link = bus->link_list; link; link = link->next) {
/* for smbus bus enumerate */ /* For SMBus bus enumerate. */
child = link->children; child = link->children;
if(child && child->path.type == DEVICE_PATH_I2C) {
if (child && child->path.type == DEVICE_PATH_I2C)
link->secondary = ++smbus_max; link->secondary = ++smbus_max;
}
for(child =link->children; child; child = child->sibling) { for (child = link->children; child; child = child->sibling) {
if (child->chip_ops && child->chip_ops->enable_dev) { if (child->chip_ops && child->chip_ops->enable_dev)
child->chip_ops->enable_dev(child); child->chip_ops->enable_dev(child);
}
if (child->ops && child->ops->enable) { if (child->ops && child->ops->enable)
child->ops->enable(child); child->ops->enable(child);
if (child->path.type == DEVICE_PATH_I2C) {
printk(BIOS_DEBUG, "smbus: %s[%d]->",
dev_path(child->bus->dev),
child->bus->link_num);
} }
if (child->path.type == DEVICE_PATH_I2C) { printk(BIOS_DEBUG, "%s %s\n", dev_path(child),
printk(BIOS_DEBUG, "smbus: %s[%d]->", child->enabled ? "enabled" : "disabled");
dev_path(child->bus->dev), child->bus->link_num );
}
printk(BIOS_DEBUG, "%s %s\n",
dev_path(child),
child->enabled?"enabled": "disabled");
} }
} }
for(link = bus->link_list; link; link = link->next) {
for(child = link->children; child; child = child->sibling) { for (link = bus->link_list; link; link = link->next) {
for (child = link->children; child; child = child->sibling) {
if (!child->ops || !child->ops->scan_bus) if (!child->ops || !child->ops->scan_bus)
continue; continue;
printk(BIOS_SPEW, "%s scanning...\n", dev_path(child)); printk(BIOS_SPEW, "%s scanning...\n", dev_path(child));
@ -128,7 +130,7 @@ static void root_dev_enable_resources(device_t dev)
* *
* @param root The root device structure. * @param root The root device structure.
* @param max The current bus number scanned so far, usually 0x00. * @param max The current bus number scanned so far, usually 0x00.
* @return TODO. * @return The largest bus number used.
*/ */
static unsigned int root_dev_scan_bus(device_t root, unsigned int max) static unsigned int root_dev_scan_bus(device_t root, unsigned int max)
{ {
@ -141,7 +143,7 @@ static void root_dev_init(device_t root)
static void root_dev_reset(struct bus *bus) static void root_dev_reset(struct bus *bus)
{ {
printk(BIOS_INFO, "Reseting board...\n"); printk(BIOS_INFO, "Resetting board...\n");
hard_reset(); hard_reset();
} }

75
src/devices/smbus_ops.c
View File

@ -28,13 +28,17 @@
struct bus *get_pbus_smbus(device_t dev) struct bus *get_pbus_smbus(device_t dev)
{ {
struct bus *pbus = dev->bus; struct bus *pbus = dev->bus;
while (pbus && pbus->dev && !ops_smbus_bus(pbus)) {
while (pbus && pbus->dev && !ops_smbus_bus(pbus))
pbus = pbus->dev->bus; pbus = pbus->dev->bus;
}
if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_smbus_bus) { if (!pbus || !pbus->dev || !pbus->dev->ops
printk(BIOS_ALERT, "%s Cannot find smbus bus operations", dev_path(dev)); || !pbus->dev->ops->ops_smbus_bus) {
printk(BIOS_ALERT, "%s Cannot find SMBus bus operations",
dev_path(dev));
die(""); die("");
} }
return pbus; return pbus;
} }
@ -50,67 +54,84 @@ struct bus *get_pbus_smbus(device_t dev)
int smbus_set_link(device_t dev) int smbus_set_link(device_t dev)
{ {
struct bus *pbus_a[4]; // 4 level mux only. Enough? struct bus *pbus_a[4]; // 4 level mux only. Enough?
struct bus *pbus = dev->bus; struct bus *pbus = dev->bus;
int pbus_num=0; int pbus_num = 0;
int i; int i;
while(pbus && pbus->dev && (pbus->dev->path.type==DEVICE_PATH_I2C)) {
while (pbus && pbus->dev && (pbus->dev->path.type == DEVICE_PATH_I2C)) {
pbus_a[pbus_num++] = pbus; pbus_a[pbus_num++] = pbus;
pbus = pbus->dev->bus; pbus = pbus->dev->bus;
} }
// printk(BIOS_INFO, "smbus_set_link: ");
for (i=pbus_num-1; i>=0; i--) { // printk(BIOS_INFO, "smbus_set_link: ");
// printk(BIOS_INFO, " %s[%d] -> ", dev_path(pbus_a[i]->dev), pbus_a[i]->link); for (i = pbus_num - 1; i >= 0; i--) {
if (ops_smbus_bus(get_pbus_smbus(pbus_a[i]->dev))) { // printk(BIOS_INFO, " %s[%d] -> ", dev_path(pbus_a[i]->dev),
if (pbus_a[i]->dev->ops && pbus_a[i]->dev->ops->set_link) // pbus_a[i]->link);
pbus_a[i]->dev->ops->set_link(pbus_a[i]->dev, pbus_a[i]->link_num); if (ops_smbus_bus(get_pbus_smbus(pbus_a[i]->dev))) {
if (pbus_a[i]->dev->ops
&& pbus_a[i]->dev->ops->set_link)
pbus_a[i]->dev->ops->set_link(pbus_a[i]->dev,
pbus_a[i]->link_num);
} }
} }
// printk(BIOS_INFO, " %s\n", dev_path(dev)); // printk(BIOS_INFO, " %s\n", dev_path(dev));
return pbus_num; return pbus_num;
} }
int smbus_quick_read(device_t dev) int smbus_quick_read(device_t dev)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->quick_read(dev); return ops_smbus_bus(get_pbus_smbus(dev))->quick_read(dev);
} }
int smbus_quick_write(device_t dev) int smbus_quick_write(device_t dev)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->quick_write(dev); return ops_smbus_bus(get_pbus_smbus(dev))->quick_write(dev);
} }
int smbus_recv_byte(device_t dev) int smbus_recv_byte(device_t dev)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->recv_byte(dev); return ops_smbus_bus(get_pbus_smbus(dev))->recv_byte(dev);
} }
int smbus_send_byte(device_t dev, uint8_t byte)
int smbus_send_byte(device_t dev, u8 byte)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->send_byte(dev, byte); return ops_smbus_bus(get_pbus_smbus(dev))->send_byte(dev, byte);
} }
int smbus_read_byte(device_t dev, uint8_t addr)
int smbus_read_byte(device_t dev, u8 addr)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->read_byte(dev, addr); return ops_smbus_bus(get_pbus_smbus(dev))->read_byte(dev, addr);
} }
int smbus_write_byte(device_t dev, uint8_t addr, uint8_t val)
int smbus_write_byte(device_t dev, u8 addr, u8 val)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->write_byte(dev, addr, val); return ops_smbus_bus(get_pbus_smbus(dev))->write_byte(dev, addr, val);
} }
int smbus_read_word(device_t dev, uint8_t addr)
int smbus_read_word(device_t dev, u8 addr)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->read_word(dev, addr); return ops_smbus_bus(get_pbus_smbus(dev))->read_word(dev, addr);
} }
int smbus_write_word(device_t dev, uint8_t addr, uint16_t val)
int smbus_write_word(device_t dev, u8 addr, u16 val)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->write_word(dev, addr, val); return ops_smbus_bus(get_pbus_smbus(dev))->write_word(dev, addr, val);
} }
int smbus_process_call(device_t dev, uint8_t cmd, uint16_t data)
int smbus_process_call(device_t dev, u8 cmd, u16 data)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->process_call(dev, cmd, data); return ops_smbus_bus(get_pbus_smbus(dev))->process_call(dev, cmd, data);
} }
int smbus_block_read(device_t dev, uint8_t cmd, uint8_t bytes, uint8_t *buffer)
int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->block_read(dev, cmd, bytes, buffer); return ops_smbus_bus(get_pbus_smbus(dev))->block_read(dev, cmd,
bytes, buffer);
} }
int smbus_block_write(device_t dev, uint8_t cmd, uint8_t bytes, const uint8_t *buffer)
int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer)
{ {
return ops_smbus_bus(get_pbus_smbus(dev))->block_write(dev, cmd, bytes, buffer); return ops_smbus_bus(get_pbus_smbus(dev))->block_write(dev, cmd,
bytes, buffer);
} }

4
src/include/device/pciexp.h
View File

@ -2,8 +2,8 @@
#define DEVICE_PCIEXP_H #define DEVICE_PCIEXP_H
/* (c) 2005 Linux Networx GPL see COPYING for details */ /* (c) 2005 Linux Networx GPL see COPYING for details */
unsigned int pciexp_scan_bus(struct bus *bus, unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
unsigned min_devfn, unsigned max_devfn, unsigned int max); unsigned int max_devfn, unsigned int max);
unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);
extern struct device_operations default_pciexp_ops_bus; extern struct device_operations default_pciexp_ops_bus;

6
src/include/device/pcix.h
View File

@ -2,10 +2,10 @@
#define DEVICE_PCIX_H #define DEVICE_PCIX_H
/* (c) 2005 Linux Networx GPL see COPYING for details */ /* (c) 2005 Linux Networx GPL see COPYING for details */
unsigned int pcix_scan_bus(struct bus *bus, unsigned int pcix_scan_bus(struct bus *bus, unsigned int min_devfn,
unsigned min_devfn, unsigned max_devfn, unsigned int max); unsigned int max_devfn, unsigned int max);
unsigned int pcix_scan_bridge(device_t dev, unsigned int max); unsigned int pcix_scan_bridge(device_t dev, unsigned int max);
const char *pcix_speed(unsigned sstatus); const char *pcix_speed(u16 sstatus);
extern struct device_operations default_pcix_ops_bus; extern struct device_operations default_pcix_ops_bus;

24
src/include/device/pnp.h
View File

@ -5,15 +5,15 @@
#include <device/device.h> #include <device/device.h>
#include <device/pnp_def.h> #include <device/pnp_def.h>
/* Primitive pnp resource manipulation */ /* Primitive PNP resource manipulation */
void pnp_write_config(device_t dev, uint8_t reg, uint8_t value); void pnp_write_config(device_t dev, u8 reg, u8 value);
uint8_t pnp_read_config(device_t dev, uint8_t reg); u8 pnp_read_config(device_t dev, u8 reg);
void pnp_set_logical_device(device_t dev); void pnp_set_logical_device(device_t dev);
void pnp_set_enable(device_t dev, int enable); void pnp_set_enable(device_t dev, int enable);
int pnp_read_enable(device_t dev); int pnp_read_enable(device_t dev);
void pnp_set_iobase(device_t dev, unsigned index, unsigned iobase); void pnp_set_iobase(device_t dev, u8 index, u16 iobase);
void pnp_set_irq(device_t dev, unsigned index, unsigned irq); void pnp_set_irq(device_t dev, u8 index, u8 irq);
void pnp_set_drq(device_t dev, unsigned index, unsigned drq); void pnp_set_drq(device_t dev, u8 index, u8 drq);
/* PNP device operations */ /* PNP device operations */
void pnp_read_resources(device_t dev); void pnp_read_resources(device_t dev);
@ -31,8 +31,8 @@ struct io_info {
struct pnp_info { struct pnp_info {
struct device_operations *ops; struct device_operations *ops;
unsigned function; unsigned int function;
unsigned flags; unsigned int flags;
#define PNP_IO0 0x001 #define PNP_IO0 0x001
#define PNP_IO1 0x002 #define PNP_IO1 0x002
#define PNP_IO2 0x004 #define PNP_IO2 0x004
@ -48,6 +48,6 @@ struct pnp_info {
}; };
struct resource *pnp_get_resource(device_t dev, unsigned index); struct resource *pnp_get_resource(device_t dev, unsigned index);
void pnp_enable_devices(struct device *dev, struct device_operations *ops, void pnp_enable_devices(struct device *dev, struct device_operations *ops,
unsigned functions, struct pnp_info *info); unsigned int functions, struct pnp_info *info);
#endif /* DEVICE_PNP_H */ #endif /* DEVICE_PNP_H */

49
src/include/device/smbus.h
View File

@ -6,44 +6,45 @@
#include <device/path.h> #include <device/path.h>
#include <device/smbus_def.h> #include <device/smbus_def.h>
/* Common smbus bus operations */ /* Common SMBus bus operations */
struct smbus_bus_operations { struct smbus_bus_operations {
int (*quick_read) (device_t dev); int (*quick_read) (device_t dev);
int (*quick_write) (device_t dev); int (*quick_write) (device_t dev);
int (*recv_byte) (device_t dev); int (*recv_byte) (device_t dev);
int (*send_byte) (device_t dev, uint8_t value); int (*send_byte) (device_t dev, u8 value);
int (*read_byte) (device_t dev, uint8_t addr); int (*read_byte) (device_t dev, u8 addr);
int (*write_byte) (device_t dev, uint8_t addr, uint8_t value); int (*write_byte) (device_t dev, u8 addr, u8 value);
int (*read_word) (device_t dev, uint8_t addr); int (*read_word) (device_t dev, u8 addr);
int (*write_word) (device_t dev, uint8_t addr, uint16_t value); int (*write_word) (device_t dev, u8 addr, u16 value);
int (*process_call)(device_t dev, uint8_t cmd, uint16_t data); int (*process_call)(device_t dev, u8 cmd, u16 data);
int (*block_read) (device_t dev, uint8_t cmd, uint8_t bytes, uint8_t *buffer); int (*block_read) (device_t dev, u8 cmd, u8 bytes, u8 *buffer);
int (*block_write) (device_t dev, uint8_t cmd, uint8_t bytes, const uint8_t *buffer); int (*block_write) (device_t dev, u8 cmd, u8 bytes, const u8 *buffer);
}; };
static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus)
{ {
const struct smbus_bus_operations *bops; const struct smbus_bus_operations *bops;
bops = 0;
if (bus && bus->dev && bus->dev->ops) { bops = 0;
bops = bus->dev->ops->ops_smbus_bus; if (bus && bus->dev && bus->dev->ops)
} bops = bus->dev->ops->ops_smbus_bus;
return bops;
return bops;
} }
struct bus *get_pbus_smbus(device_t dev); struct bus *get_pbus_smbus(device_t dev);
int smbus_set_link(device_t dev); int smbus_set_link(device_t dev);
int smbus_quick_read(device_t dev); int smbus_quick_read(device_t dev);
int smbus_quick_write(device_t dev); int smbus_quick_write(device_t dev);
int smbus_recv_byte(device_t dev); int smbus_recv_byte(device_t dev);
int smbus_send_byte(device_t dev, uint8_t byte); int smbus_send_byte(device_t dev, u8 byte);
int smbus_read_byte(device_t dev, uint8_t addr); int smbus_read_byte(device_t dev, u8 addr);
int smbus_write_byte(device_t dev, uint8_t addr, uint8_t val); int smbus_write_byte(device_t dev, u8 addr, u8 val);
int smbus_read_word(device_t dev, uint8_t addr); int smbus_read_word(device_t dev, u8 addr);
int smbus_write_word(device_t dev, uint8_t addr, uint16_t val); int smbus_write_word(device_t dev, u8 addr, u16 val);
int smbus_process_call(device_t dev, uint8_t cmd, uint16_t data); int smbus_process_call(device_t dev, u8 cmd, u16 data);
int smbus_block_read(device_t dev, uint8_t cmd, uint8_t bytes, uint8_t *buffer); int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer);
int smbus_block_write(device_t dev, uint8_t cmd, uint8_t bytes, const uint8_t *buffer); int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer);
#endif /* DEVICE_SMBUS_H */ #endif /* DEVICE_SMBUS_H */