Limit the device field to 5 bits.
The field device in PCI_ADDRESS only takes 5 bits. So if the device number is more than 32, it will truncated to 5 bits. Before this patch, other pci devices will be incorrectly probed as processor node. Change-Id: I64dcd4f4fda7b7080a9905dce580feb829584b94 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1264 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
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@ -120,8 +120,8 @@ static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmi
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static device_t get_node_pci(u32 nodeid, u32 fn)
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{
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#if MAX_NODE_NUMS == 64
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if (nodeid < 32) {
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#if MAX_NODE_NUMS + CONFIG_CDB >= 32
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if ((CONFIG_CDB + nodeid) < 32) {
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return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
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} else {
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return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
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