mainboard: Drop unreferenced CMOS options

Remove CMOS options that are not read anywhere in the code. They may
have been used in the native AMD platform code, or got copied around
from board to board and never did anything to begin with.

Change-Id: Ib19ace4fa6e610a28e68fe2612b4e623f200f064
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52638
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2021-04-23 17:06:36 +02:00
parent 2ffa9c6f29
commit d4799d7b04
29 changed files with 0 additions and 423 deletions

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 2 e 3 power_on_after_fail 400 2 e 3 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -39,18 +33,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -5,16 +5,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
#456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -38,18 +32,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -30,12 +30,7 @@ entries
#96 288 r 0 temporary_filler #96 288 r 0 temporary_filler
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
386 1 e 1 ECC_memory
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first
@ -43,7 +38,6 @@ entries
424 4 e 7 boot_third 424 4 e 7 boot_third
428 4 h 0 boot_index 428 4 h 0 boot_index
432 8 h 0 boot_countdown 432 8 h 0 boot_countdown
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
728 256 h 0 user_data 728 256 h 0 user_data
@ -71,18 +65,6 @@ enumerations
7 9 Fallback_HDD 7 9 Fallback_HDD
7 10 Fallback_Floppy 7 10 Fallback_Floppy
#7 3 ROM #7 3 ROM
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 r 0 reboot_bits 388 4 r 0 reboot_bits
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -1,4 +1,3 @@
boot_option=Fallback boot_option=Fallback
power_on_after_fail=Enable power_on_after_fail=Enable
debug_level=Debug debug_level=Debug
ECC_memory=Disable

View file

@ -10,7 +10,6 @@ entries
448 1 e 1 power_on_after_fail 448 1 e 1 power_on_after_fail
452 4 e 6 debug_level 452 4 e 6 debug_level
456 1 e 1 ECC_memory
# VBOOT # VBOOT
464 128 r 0 vbnv 464 128 r 0 vbnv

View file

@ -1,4 +1,3 @@
boot_option=Fallback boot_option=Fallback
power_on_after_fail=Enable power_on_after_fail=Enable
debug_level=Debug debug_level=Debug
ECC_memory=Disable

View file

@ -10,7 +10,6 @@ entries
448 1 e 1 power_on_after_fail 448 1 e 1 power_on_after_fail
452 4 e 6 debug_level 452 4 e 6 debug_level
456 1 e 1 ECC_memory
# VBOOT # VBOOT
464 128 r 0 vbnv 464 128 r 0 vbnv

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,17 +8,11 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
#400 8 r 8 reserved for century byte #400 8 r 8 reserved for century byte
408 1 e 1 power_on_after_fail 408 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -37,18 +31,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 h 0 reboot_counter 388 4 h 0 reboot_counter
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums

View file

@ -1,3 +1,2 @@
boot_option=Fallback boot_option=Fallback
multi_core=Enable
debug_level=Debug debug_level=Debug

View file

@ -5,7 +5,6 @@ entries
384 4 r 0 reboot_bits 384 4 r 0 reboot_bits
# leave 3 bits to make checksummed area start byte-aligned # leave 3 bits to make checksummed area start byte-aligned
392 1 e 2 boot_option 392 1 e 2 boot_option
393 1 e 1 multi_core
400 4 e 4 debug_level 400 4 e 4 debug_level
# leave 7 bits to make checksummed area end byte-aligned # leave 7 bits to make checksummed area end byte-aligned
408 16 h 0 check_sum 408 16 h 0 check_sum
@ -13,9 +12,6 @@ entries
enumerations enumerations
#<config-id> <value> <label> #<config-id> <value> <label>
## for multi_core
1 0 Enable
1 1 Disable
## for boot_option ## for boot_option
2 0 Fallback 2 0 Fallback
2 1 Normal 2 1 Normal

View file

@ -8,16 +8,10 @@ entries
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
388 4 r 0 reboot_bits 388 4 r 0 reboot_bits
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu 445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data 728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
@ -36,18 +30,6 @@ enumerations
6 6 Info 6 6 Info
6 7 Debug 6 7 Debug
6 8 Spew 6 8 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
checksums checksums