mainboard/google/puff: Clean up dt for pci 15.2
Seems nothing special is needed here from coreboot. V.2: Fix typo as well in speed map. BRANCH=none BUG=b:143047058 TEST=./util/abuild/abuild -p none -t google/hatch -x -a Change-Id: Ief750f98677b2017af78fb0b5bc98e1492dedbe4 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -86,7 +86,7 @@ chip soc/intel/cannonlake
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.rise_time_ns = 0,
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.rise_time_ns = 0,
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.fall_time_ns = 0,
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.fall_time_ns = 0,
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},
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},
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.i2c[1] = {
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.i2c[2] = {
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.speed = I2C_SPEED_FAST,
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 0,
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.rise_time_ns = 0,
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.fall_time_ns = 0,
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.fall_time_ns = 0,
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@ -111,16 +111,7 @@ chip soc/intel/cannonlake
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# RFU - Reserved for Future Use.
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# RFU - Reserved for Future Use.
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end # I2C #0
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end # I2C #0
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device pci 15.1 off end # I2C #1
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device pci 15.1 off end # I2C #1
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device pci 15.2 on
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device pci 15.2 on end # I2C #2, PCON PS175.
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# chip drivers/i2c/generic
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# register "name" = ""PS175""
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# register "desc" = ""PCON PS175""
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# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
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# register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C11)"
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# register "has_power_resource" = "1"
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# device i2c 15 on end
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# end
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end # I2C #2
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device pci 15.3 on
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device pci 15.3 on
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# chip drivers/i2c/generic
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# chip drivers/i2c/generic
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# register "name" = ""RTD21""
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# register "name" = ""RTD21""
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