mainboard/google/puff: Clean up dt for pci 15.2

Seems nothing special is needed here from coreboot.

V.2: Fix typo as well in speed map.

BRANCH=none
BUG=b:143047058
TEST=./util/abuild/abuild -p none -t google/hatch -x -a

Change-Id: Ief750f98677b2017af78fb0b5bc98e1492dedbe4
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Edward O'Callaghan 2019-12-15 23:29:49 +11:00 committed by Edward O'Callaghan
parent 8f454fd2ea
commit d4823664a8
1 changed files with 2 additions and 11 deletions

View File

@ -86,7 +86,7 @@ chip soc/intel/cannonlake
.rise_time_ns = 0, .rise_time_ns = 0,
.fall_time_ns = 0, .fall_time_ns = 0,
}, },
.i2c[1] = { .i2c[2] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 0, .rise_time_ns = 0,
.fall_time_ns = 0, .fall_time_ns = 0,
@ -111,16 +111,7 @@ chip soc/intel/cannonlake
# RFU - Reserved for Future Use. # RFU - Reserved for Future Use.
end # I2C #0 end # I2C #0
device pci 15.1 off end # I2C #1 device pci 15.1 off end # I2C #1
device pci 15.2 on device pci 15.2 on end # I2C #2, PCON PS175.
# chip drivers/i2c/generic
# register "name" = ""PS175""
# register "desc" = ""PCON PS175""
# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
# register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C11)"
# register "has_power_resource" = "1"
# device i2c 15 on end
# end
end # I2C #2
device pci 15.3 on device pci 15.3 on
# chip drivers/i2c/generic # chip drivers/i2c/generic
# register "name" = ""RTD21"" # register "name" = ""RTD21""