amdfam10 boards: Drop global bus_isa variable
Value of the global is never evaluated. Change-Id: I74106b0f5f033053288882a5bcd3c1dba3235ac0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30628 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
parent
1db4e3a358
commit
d482c7dace
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@ -23,7 +23,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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*/
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int bus_isa;
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u8 bus_rs780[11];
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u8 bus_sb800[6];
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u32 apicid_sb800;
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@ -88,16 +87,12 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
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if (dev) {
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bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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for (i = 0; i < 4; i++) {
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
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if (dev) {
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bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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@ -107,14 +102,11 @@ void get_bus_conf(void)
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if (dev) {
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bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_rs780[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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apicid_base = get_apicid_base(1);
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else
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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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}
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extern u8 bus_isa;
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extern u8 bus_rs780[8];
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extern u8 bus_sb800[6];
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extern unsigned long sbdn_sb800;
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@ -20,7 +20,6 @@
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#include <stdint.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern int bus_isa;
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extern u8 bus_rs780[11];
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extern u8 bus_sb800[6];
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extern u32 apicid_sb800;
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@ -40,6 +39,7 @@ u8 intr_data[] = {
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static void *smp_write_config_table(void *v)
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{
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struct mp_config_table *mc;
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int bus_isa;
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u32 dword = 0;
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u8 byte;
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@ -23,7 +23,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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*/
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int bus_isa;
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u8 bus_rs780[11];
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u8 bus_sb800[6];
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u32 apicid_sb800;
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@ -87,16 +86,12 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
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if (dev) {
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bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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for (i = 0; i < 4; i++) {
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
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if (dev) {
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bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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@ -106,14 +101,11 @@ void get_bus_conf(void)
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if (dev) {
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bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_rs780[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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apicid_base = get_apicid_base(1);
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else
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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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}
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extern u8 bus_isa;
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extern u8 bus_rs780[8];
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extern u8 bus_sb800[6];
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extern unsigned long sbdn_sb800;
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@ -21,7 +21,6 @@
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#include <southbridge/amd/sb800/sb800.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern int bus_isa;
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extern u8 bus_rs780[11];
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extern u8 bus_sb800[6];
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extern u32 apicid_sb800;
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@ -41,6 +40,7 @@ u8 intr_data[] = {
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static void *smp_write_config_table(void *v)
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{
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struct mp_config_table *mc;
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int bus_isa;
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u32 dword;
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u8 byte;
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@ -25,7 +25,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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*/
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u8 bus_isa;
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u8 bus_sr5650[14];
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u8 bus_sp5100[2];
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u32 apicid_sp5100;
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@ -91,8 +90,6 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
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if (dev) {
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bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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/* sr5650 */
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@ -101,14 +98,11 @@ void get_bus_conf(void)
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if (dev) {
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bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_sr5650[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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apicid_base = get_apicid_base(1);
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else
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@ -60,7 +60,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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}
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extern u8 bus_isa;
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extern u8 bus_sr5650[14];
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extern u8 bus_sp5100[2];
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extern u32 sbdn_sp5100;
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@ -30,7 +30,6 @@
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#include <arch/pirq_routing.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern unsigned char bus_isa;
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extern unsigned char bus_ck804[6];
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@ -25,7 +25,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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*/
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u8 bus_isa;
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u8 bus_sr5650[14];
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u8 bus_sp5100[2];
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u32 apicid_sp5100;
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@ -91,8 +90,6 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
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if (dev) {
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bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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/* sr5650 */
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@ -101,14 +98,11 @@ void get_bus_conf(void)
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if (dev) {
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bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_sr5650[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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apicid_base = get_apicid_base(1);
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else
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@ -60,7 +60,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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}
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extern u8 bus_isa;
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extern u8 bus_sr5650[14];
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extern u8 bus_sp5100[2];
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extern u32 sbdn_sp5100;
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@ -23,7 +23,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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*/
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int bus_isa;
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u8 bus_rs780[11];
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u8 bus_sb800[6];
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u32 apicid_sb800;
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@ -88,16 +87,12 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
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if (dev) {
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bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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for (i = 0; i < 4; i++) {
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
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if (dev) {
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bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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@ -107,14 +102,11 @@ void get_bus_conf(void)
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if (dev) {
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bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_rs780[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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apicid_base = get_apicid_base(1);
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else
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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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}
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extern u8 bus_isa;
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extern u8 bus_rs780[8];
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extern u8 bus_sb800[6];
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extern unsigned long sbdn_sb800;
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@ -20,7 +20,6 @@
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#include <stdint.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern int bus_isa;
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extern u8 bus_rs780[11];
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extern u8 bus_sb800[6];
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extern u32 apicid_sb800;
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@ -40,6 +39,7 @@ u8 intr_data[] = {
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static void *smp_write_config_table(void *v)
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{
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struct mp_config_table *mc;
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int bus_isa;
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u32 dword = 0;
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u8 byte;
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@ -23,7 +23,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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*/
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int bus_isa;
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u8 bus_rs780[11];
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u8 bus_sb800[6];
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u32 apicid_sb800;
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@ -88,16 +87,12 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
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if (dev) {
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bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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for (i = 0; i < 4; i++) {
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dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
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if (dev) {
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bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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@ -107,14 +102,11 @@ void get_bus_conf(void)
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if (dev) {
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bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_rs780[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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apicid_base = get_apicid_base(1);
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else
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@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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}
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extern u8 bus_isa;
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extern u8 bus_rs780[8];
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extern u8 bus_sb800[6];
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extern unsigned long sbdn_sb800;
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@ -20,7 +20,6 @@
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#include <stdint.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern int bus_isa;
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extern u8 bus_rs780[11];
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extern u8 bus_sb800[6];
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extern u32 apicid_sb800;
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@ -40,6 +39,7 @@ u8 intr_data[] = {
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static void *smp_write_config_table(void *v)
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{
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struct mp_config_table *mc;
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int bus_isa;
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u32 dword = 0;
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u8 byte;
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@ -24,7 +24,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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*/
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u8 bus_isa;
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u8 bus_sr5650[14];
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u8 bus_sp5100[2];
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u32 apicid_sp5100;
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@ -90,8 +89,6 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
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if (dev) {
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bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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/* sr5650 */
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@ -100,14 +97,11 @@ void get_bus_conf(void)
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if (dev) {
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bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_sr5650[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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apicid_base = get_apicid_base(1);
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else
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@ -40,7 +40,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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}
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extern u8 bus_isa;
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extern u8 bus_rs780[8];
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extern u8 bus_sp5100[2];
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extern unsigned long sbdn_sp5100;
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