GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/xeon_sp/skx/acpi.c: Update with cpx changes 

Prepare for common ACPI. This primarily makes the skx madt table
generation match cpx. There are a few other small changes to remove
unused code and make the files match.

Change-Id: I71a59181226d79c40a4af405653c50c970fb720b
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46599
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marc Jones 2020-10-19 20:16:41 -06:00 committed by Marc Jones
parent cbbce66baf
commit d49c8cfbf1
1 changed files with 60 additions and 60 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

120
src/soc/intel/xeon_sp/skx/acpi.c
View File

@ -24,7 +24,7 @@ acpi_cstate_t *soc_get_cstate_map(size_t *entries)
static int acpi_sci_irq(void)
{
int sci_irq = 9;
int32_t scis;
uint32_t scis;
scis = soc_read_sci_irq_select();
scis &= SCI_IRQ_SEL;
@ -74,55 +74,50 @@ static unsigned long acpi_madt_irq_overrides(unsigned long current)
unsigned long acpi_fill_madt(unsigned long current)
{
size_t hob_size = 0;
const uint8_t fsp_hob_iio_universal_data_guid[16] =
FSP_HOB_IIO_UNIVERSAL_DATA_GUID;
const IIO_UDS *hob;
int cur_stack;
int cur_index;
struct iiostack_resource stack_info = {0};
/* With XEON-SP FSP, PCH IOAPIC is allocated with first 120 GSIs. */
int gsi_bases[] = { 0, 0x18, 0x20, 0x28, 0x30, 0x48, 0x50, 0x58, 0x60 };
int ioapic_ids[] = { 0x8, 0x9, 0xa, 0xb, 0xc, 0xf, 0x10, 0x11, 0x12 };
/* Local APICs */
current = xeonsp_acpi_create_madt_lapics(current);
hob = fsp_find_extension_hob_by_guid(fsp_hob_iio_universal_data_guid, &hob_size);
assert(hob != NULL && hob_size != 0);
cur_index = 0;
get_iiostack_info(&stack_info);
cur_stack = 0;
for (int socket = 0; socket < hob->PlatformData.numofIIO; ++socket) {
for (int stack = 0; stack < MAX_IIO_STACK; ++stack) {
const STACK_RES *ri =
&hob->PlatformData.IIO_resource[socket].StackRes[stack];
// TODO: do we have situation with only bus 0 and one stack?
if (ri->BusBase != ri->BusLimit) {
assert(cur_stack < ARRAY_SIZE(ioapic_ids));
assert(cur_stack < ARRAY_SIZE(gsi_bases));
int ioapic_id = ioapic_ids[cur_stack];
int gsi_base = gsi_bases[cur_stack];
printk(BIOS_DEBUG, "Adding MADT IOAPIC for socket: %d, stack: %d, ioapic_id: 0x%x, "
"ioapic_base: 0x%x, gsi_base: 0x%x\n",
socket, stack, ioapic_id, ri->IoApicBase, gsi_base);
current += acpi_create_madt_ioapic(
(acpi_madt_ioapic_t *)current,
ioapic_id, ri->IoApicBase, gsi_base);
++cur_stack;
for (int stack = 0; stack < stack_info.no_of_stacks; ++stack) {
const STACK_RES *ri = &stack_info.res[stack];
assert(cur_index < ARRAY_SIZE(ioapic_ids));
assert(cur_index < ARRAY_SIZE(gsi_bases));
int ioapic_id = ioapic_ids[cur_index];
int gsi_base = gsi_bases[cur_index];
printk(BIOS_DEBUG, "Adding MADT IOAPIC for stack: %d, ioapic_id: 0x%x, "
"ioapic_base: 0x%x, gsi_base: 0x%x\n",
stack, ioapic_id, ri->IoApicBase, gsi_base);
current += acpi_create_madt_ioapic(
(acpi_madt_ioapic_t *)current,
ioapic_id, ri->IoApicBase, gsi_base);
++cur_index;
if (socket == 0 && stack == 0) {
assert(cur_stack < ARRAY_SIZE(ioapic_ids));
assert(cur_stack < ARRAY_SIZE(gsi_bases));
ioapic_id = ioapic_ids[cur_stack];
gsi_base = gsi_bases[cur_stack];
printk(BIOS_DEBUG, "Adding MADT IOAPIC for socket: %d, stack: %d, ioapic_id: 0x%x, "
"ioapic_base: 0x%x, gsi_base: 0x%x\n",
socket, stack, ioapic_id,
ri->IoApicBase + 0x1000, gsi_base);
current += acpi_create_madt_ioapic(
(acpi_madt_ioapic_t *)current,
ioapic_id, ri->IoApicBase + 0x1000, gsi_base);
++cur_stack;
}
}
/*
* Stack 0 has non-PCH IOAPIC and PCH IOAPIC.
* Add entry for PCH IOAPIC.
*/
if (stack == 0) { /* PCH IOAPIC */
assert(cur_index < ARRAY_SIZE(ioapic_ids));
assert(cur_index < ARRAY_SIZE(gsi_bases));
ioapic_id = ioapic_ids[cur_index];
gsi_base = gsi_bases[cur_index];
printk(BIOS_DEBUG, "Adding MADT IOAPIC for stack: %d, ioapic_id: 0x%x, "
"ioapic_base: 0x%x, gsi_base: 0x%x\n",
stack, ioapic_id,
ri->IoApicBase + 0x1000, gsi_base);
current += acpi_create_madt_ioapic(
(acpi_madt_ioapic_t *)current,
ioapic_id, ri->IoApicBase + 0x1000, gsi_base);
++cur_index;
}
}
@ -220,27 +215,31 @@ void southbridge_inject_dsdt(const struct device *device)
}
}
int calculate_power(int tdp, int p1_ratio, int ratio)
{
u32 m;
u32 power;
/*
* M = ((1.1 - ((p1_ratio - ratio) * 0.00625)) / 1.1) ^ 2
*
* Power = (ratio / p1_ratio) * m * tdp
*/
static acpi_tstate_t xeon_sp_tss_table[] = {
{ 100, 1000, 0, 0x00, 0 },
{ 88, 875, 0, 0x1e, 0 },
{ 75, 750, 0, 0x1c, 0 },
{ 63, 625, 0, 0x1a, 0 },
{ 50, 500, 0, 0x18, 0 },
{ 38, 375, 0, 0x16, 0 },
{ 25, 250, 0, 0x14, 0 },
{ 13, 125, 0, 0x12, 0 },
};
m = (110000 - ((p1_ratio - ratio) * 625)) / 11;
m = (m * m) / 1000;
power = ((ratio * 100000 / p1_ratio) / 100);
power *= (m / 100) * (tdp / 1000);
power /= 1000;
return (int)power;
}
acpi_tstate_t *soc_get_tss_table(int *entries)
{
*entries = ARRAY_SIZE(xeon_sp_tss_table);
return xeon_sp_tss_table;
}
void generate_t_state_entries(int core, int cores_per_package)
{
*entries = 0;
return NULL;
}
void generate_cpu_entries(const struct device *device)
@ -267,12 +266,13 @@ void generate_cpu_entries(const struct device *device)
/* NOTE: Intel idle driver doesn't use ACPI C-state tables */
/* TODO: Soc specific power states generation */
/* Soc specific power states generation */
soc_power_states_generation(core_id, threads_per_package);
acpigen_pop_len();
}
}
/* PPKG is usually used for thermal management
of the first and only package. */
/* PPKG is usually used for thermal management of the first and only package. */
acpigen_write_processor_package("PPKG", 0, threads_per_package);
/* Add a method to notify processor nodes */