soc/intel/jasperlake: Correct the EMMC PCR Port ID

Updating EMMC PCR PID from 0x52 to 0x51 for Jasperlake

BUG=b:155595624
BRANCH=None
TEST=Build, boot JSLRVP from emmc

Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Change-Id: I17d4e7b7e0fe5e0b18867b6481b5bc9227ae19e3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>

src/soc/intel/jasperlake/include/soc/pcr_ids.h

@@ -4,9 +4,9 @@
 #ifndef SOC_JASPERLAKE_PCR_H
 #define SOC_JASPERLAKE_PCR_H
 /*
- * Port ids
+ * Port IDs
  */
-#define PID_EMMC	0x52
+#define PID_EMMC	0x51
 #define PID_SDX		0x53
 
 #define PID_GPIOCOM0	0x6e