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rockchip/rk3288: refactor i2c interface to allow support of rk3399 

Both SOCs use the same base i2c controller, the difference mostly
being the number of interfaces and distribution of the interfaces'
registers between register files.

Upload check was complaining about misspelled labels, fixed them to
pacify the check.

With this patch in place it is easy to add support for 3399.

BUG=none
BRANCH=none
TEST=brought up veyron_mickey all the way to booting the kernel. It
     properly recognized the TPM and the edid of the panel, proving
     that i2c interface is operational.

Change-Id: I656640feabd0fc01d2c3b98bc5bd1e5f76f063f6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 82832dfd4948ce9a5034ea8ec0463ab82f0f5754
Original-Change-Id: I4829ea53e5f4cb055793d9a7c9957d6438138956
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/337971
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/14335
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
huang lin 2016-03-02 18:46:24 +08:00 committed by Patrick Georgi
parent c14b54dd17
commit d4c175b97b
5 changed files with 57 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
src/soc/rockchip/rk3288/i2c.c → src/soc/rockchip/common/i2c.c
View File

@ -36,7 +36,7 @@
#define i2c_info(x...) do {if (0) printk(BIOS_DEBUG, x); } while (0)
struct rk3288_i2c_regs {
struct rk_i2c_regs {
u32 i2c_con;
u32 i2c_clkdiv;
u32 i2c_mrxaddr;
@ -52,14 +52,7 @@ struct rk3288_i2c_regs {
u32 rxdata[8];
};
struct rk3288_i2c_regs *i2c_bus[] = {
(struct rk3288_i2c_regs *)0xff650000,
(struct rk3288_i2c_regs *)0xff140000,
(struct rk3288_i2c_regs *)0xff660000,
(struct rk3288_i2c_regs *)0xff150000,
(struct rk3288_i2c_regs *)0xff160000,
(struct rk3288_i2c_regs *)0xff170000,
};
static const uintptr_t i2c_bus[] = IC_BASES;
/* Con register bits. */
#define I2C_ACT2NAK (1<<6)
@ -87,7 +80,7 @@ struct rk3288_i2c_regs *i2c_bus[] = {
#define I2C_BTFI (1<<0)
#define I2C_CLEANI 0x7F
static int i2c_send_start(struct rk3288_i2c_regs *reg_addr)
static int i2c_send_start(struct rk_i2c_regs *reg_addr)
{
int res = 0;
int timeout = I2C_TIMEOUT_US;
@ -109,7 +102,7 @@ static int i2c_send_start(struct rk3288_i2c_regs *reg_addr)
return res;
}
static int i2c_send_stop(struct rk3288_i2c_regs *reg_addr)
static int i2c_send_stop(struct rk_i2c_regs *reg_addr)
{
int res = 0;
int timeout = I2C_TIMEOUT_US;
@ -131,14 +124,14 @@ static int i2c_send_stop(struct rk3288_i2c_regs *reg_addr)
return res;
}
static int i2c_read(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
static int i2c_read(struct rk_i2c_regs *reg_addr, struct i2c_seg segment)
{
int res = 0;
uint8_t *data = segment.buf;
int timeout = I2C_TIMEOUT_US;
unsigned int bytes_remaining = segment.len;
unsigned int bytes_transfered = 0;
unsigned int words_transfered = 0;
unsigned int bytes_transferred = 0;
unsigned int words_transferred = 0;
unsigned int rxdata = 0;
unsigned int con = 0;
unsigned int i, j;
@ -147,15 +140,15 @@ static int i2c_read(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
write32(&reg_addr->i2c_mrxraddr, 0);
con = I2C_MODE_TRX | I2C_EN | I2C_ACT2NAK;
while (bytes_remaining) {
bytes_transfered = MIN(bytes_remaining, 32);
bytes_remaining -= bytes_transfered;
bytes_transferred = MIN(bytes_remaining, 32);
bytes_remaining -= bytes_transferred;
if (!bytes_remaining)
con |= I2C_EN | I2C_NAK;
words_transfered = ALIGN_UP(bytes_transfered, 4) / 4;
words_transferred = ALIGN_UP(bytes_transferred, 4) / 4;
write32(&reg_addr->i2c_ipd, I2C_CLEANI);
write32(&reg_addr->i2c_con, con);
write32(&reg_addr->i2c_mrxcnt, bytes_transfered);
write32(&reg_addr->i2c_mrxcnt, bytes_transferred);
timeout = I2C_TIMEOUT_US;
while (timeout--) {
@ -175,11 +168,11 @@ static int i2c_read(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
return I2C_TIMEOUT;
}
for (i = 0; i < words_transfered; i++) {
for (i = 0; i < words_transferred; i++) {
rxdata = read32(&reg_addr->rxdata[i]);
i2c_info("I2c Read::RXDATA[%d] = 0x%x\n", i, rxdata);
for (j = 0; j < 4; j++) {
if ((i * 4 + j) == bytes_transfered)
if ((i * 4 + j) == bytes_transferred)
break;
*data++ = (rxdata >> (j * 8)) & 0xff;
}
@ -189,25 +182,25 @@ static int i2c_read(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
return res;
}
static int i2c_write(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
static int i2c_write(struct rk_i2c_regs *reg_addr, struct i2c_seg segment)
{
int res = 0;
uint8_t *data = segment.buf;
int timeout = I2C_TIMEOUT_US;
int bytes_remaining = segment.len + 1;
int bytes_transfered = 0;
int words_transfered = 0;
int bytes_transferred = 0;
int words_transferred = 0;
unsigned int i;
unsigned int j = 1;
u32 txdata = 0;
txdata |= (segment.chip << 1);
while (bytes_remaining) {
bytes_transfered = MIN(bytes_remaining, 32);
words_transfered = ALIGN_UP(bytes_transfered, 4) / 4;
for (i = 0; i < words_transfered; i++) {
bytes_transferred = MIN(bytes_remaining, 32);
words_transferred = ALIGN_UP(bytes_transferred, 4) / 4;
for (i = 0; i < words_transferred; i++) {
do {
if ((i * 4 + j) == bytes_transfered)
if ((i * 4 + j) == bytes_transferred)
break;
txdata |= (*data++) << (j * 8);
} while (++j < 4);
@ -220,7 +213,7 @@ static int i2c_write(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
write32(&reg_addr->i2c_ipd, I2C_CLEANI);
write32(&reg_addr->i2c_con,
I2C_EN | I2C_MODE_TX | I2C_ACT2NAK);
write32(&reg_addr->i2c_mtxcnt, bytes_transfered);
write32(&reg_addr->i2c_mtxcnt, bytes_transferred);
timeout = I2C_TIMEOUT_US;
while (timeout--) {
@ -241,7 +234,7 @@ static int i2c_write(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
return I2C_TIMEOUT;
}
bytes_remaining -= bytes_transfered;
bytes_remaining -= bytes_transferred;
}
return res;
}
@ -263,7 +256,7 @@ int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
{
int i;
int res = 0;
struct rk3288_i2c_regs *regs = i2c_bus[bus];
struct rk_i2c_regs *regs = (struct rk_i2c_regs *)(i2c_bus[bus]);
struct i2c_seg *seg = segments;
for (i = 0; i < seg_count; i++, seg++) {
@ -279,26 +272,10 @@ void i2c_init(unsigned int bus, unsigned int hz)
unsigned int clk_div;
unsigned int divl;
unsigned int divh;
unsigned int i2c_src_clk = 0;
struct rk3288_i2c_regs *regs = i2c_bus[bus];
unsigned int i2c_src_clk;
struct rk_i2c_regs *regs = (struct rk_i2c_regs *)(i2c_bus[bus]);
/*i2c0,i2c2 src clk from pd_bus_pclk
other i2c src clk from peri_pclk
*/
switch (bus) {
case 0:
case 2:
i2c_src_clk = PD_BUS_PCLK_HZ;
break;
case 1:
case 3:
case 4:
case 5:
i2c_src_clk = PERI_PCLK_HZ;
break;
default:
break;
}
i2c_src_clk = rkclk_i2c_clock_for_bus(bus);
/*SCL Divisor = 8*(CLKDIVL + 1 + CLKDIVH + 1)
SCL = PCLK/ SCLK Divisor

8
src/soc/rockchip/rk3288/Makefile.inc
View File

@ -26,7 +26,7 @@ bootblock-y += timer.c
bootblock-y += clock.c
bootblock-y += ../common/spi.c
bootblock-y += gpio.c
bootblock-y += i2c.c
bootblock-y += ../common/i2c.c
bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
bootblock-y += ../common/rk808.c
@ -36,13 +36,13 @@ verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
verstage-y += gpio.c
verstage-y += clock.c
libverstage-y += crypto.c
verstage-y += i2c.c
verstage-y += ../common/i2c.c
verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
romstage-y += ../common/cbmem.c
romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
romstage-y += i2c.c
romstage-y += ../common/i2c.c
romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
romstage-y += clock.c
romstage-y += gpio.c
@ -55,7 +55,7 @@ romstage-y += tsadc.c
ramstage-y += soc.c
ramstage-y += ../common/cbmem.c
ramstage-y += timer.c
ramstage-y += i2c.c
ramstage-y += ../common/i2c.c
ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
ramstage-y += clock.c
ramstage-y += ../common/spi.c

23
src/soc/rockchip/rk3288/clock.c
View File

@ -21,6 +21,7 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/grf.h>
#include <soc/i2c.h>
#include <soc/soc.h>
#include <stdint.h>
#include <stdlib.h>
@ -667,3 +668,25 @@ int rkclk_was_watchdog_reset(void)
/* Bits 5 and 4 are "second" and "first" global watchdog reset. */
return read32(&cru_ptr->cru_glb_rst_st) & 0x30;
}
unsigned rkclk_i2c_clock_for_bus(unsigned bus)
{
/*i2c0,i2c2 src clk from pd_bus_pclk
other i2c src clk from peri_pclk
*/
switch (bus) {
case 0:
case 2:
return PD_BUS_PCLK_HZ;
case 1:
case 3:
case 4:
case 5:
return PERI_PCLK_HZ;
default:
return -1; /* Should never happen. */
}
}

2
src/soc/rockchip/rk3288/include/soc/addressmap.h
View File

@ -99,5 +99,7 @@
#define BOOT_ROM_BASE 0xFFFF0000
#define BOOT_ROM_CHIP_VER (BOOT_ROM+0x27F0)
#define IC_BASES { I2C0_BASE, I2C1_BASE, I2C2_BASE, \
I2C3_BASE, I2C4_BASE, I2C5_BASE }
#endif /* __SOC_ROCKCHIP_RK3288_ADDRESSMAP_H__ */

2
src/soc/rockchip/rk3288/include/soc/clock.h
View File

@ -53,4 +53,6 @@ int rkclk_configure_vop_dclk(u32 vop_id, u32 dclk_hz);
void rkclk_configure_edp(void);
void rkclk_configure_hdmi(void);
int rkclk_was_watchdog_reset(void);
unsigned rkclk_i2c_clock_for_bus(unsigned bus);
#endif /* __SOC_ROCKCHIP_RK3288_CLOCK_H__ */