mainboard/lippert/frontrunner-af: Use tabs for indents

Change-Id: Id8b60d32d5bdaaa6c693dcf5db992ed975cc2400
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16685
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2016-09-21 21:07:42 +02:00 committed by Patrick Georgi
parent 62d4b0062b
commit d4c89e40c0
2 changed files with 17 additions and 17 deletions

View File

@ -23,7 +23,7 @@ DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
*/ */
Method(UCOC, 0) { Method(UCOC, 0) {
Sleep(20) Sleep(20)
Store(0x13,CMTI) Store(0x13,CMTI)
Store(0,GPSL) Store(0,GPSL)
} }

View File

@ -1559,8 +1559,8 @@ DefinitionBlock (
PEBM PEBM
) )
#endif #endif
/* memory space for PCI BARs below 4GB */ /* memory space for PCI BARs below 4GB */
Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO)
}) /* End Name(_SB.PCI0.CRES) */ }) /* End Name(_SB.PCI0.CRES) */
Method(_CRS, 0) { Method(_CRS, 0) {
@ -1604,19 +1604,19 @@ DefinitionBlock (
} }
#endif #endif
CreateDWordField(CRES, ^MMIO._BAS, MM1B) CreateDWordField(CRES, ^MMIO._BAS, MM1B)
CreateDWordField(CRES, ^MMIO._LEN, MM1L) CreateDWordField(CRES, ^MMIO._LEN, MM1L)
/* /*
* Declare memory between TOM1 and 4GB as available * Declare memory between TOM1 and 4GB as available
* for PCI MMIO. * for PCI MMIO.
* Use ShiftLeft to avoid 64bit constant (for XP). * Use ShiftLeft to avoid 64bit constant (for XP).
* This will work even if the OS does 32bit arithmetic, as * This will work even if the OS does 32bit arithmetic, as
* 32bit (0x00000000 - TOM1) will wrap and give the same * 32bit (0x00000000 - TOM1) will wrap and give the same
* result as 64bit (0x100000000 - TOM1). * result as 64bit (0x100000000 - TOM1).
*/ */
Store(TOM1, MM1B) Store(TOM1, MM1B)
ShiftLeft(0x10000000, 4, Local0) ShiftLeft(0x10000000, 4, Local0)
Subtract(Local0, TOM1, Local0) Subtract(Local0, TOM1, Local0)
Store(Local0, MM1L) Store(Local0, MM1L)
Return(CRES) /* note to change the Name buffer */ Return(CRES) /* note to change the Name buffer */
} /* end of Method(_SB.PCI0._CRS) */ } /* end of Method(_SB.PCI0._CRS) */
@ -1648,7 +1648,7 @@ DefinitionBlock (
/* On older chips, clear PciExpWakeDisEn */ /* On older chips, clear PciExpWakeDisEn */
/*if (LLessEqual(\SBRI, 0x13)) { /*if (LLessEqual(\SBRI, 0x13)) {
* Store(0,\PWDE) * Store(0,\PWDE)
* } * }
*/ */
} /* End Method(_SB._INI) */ } /* End Method(_SB._INI) */