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google/eve: Add rise/fall times for I2C buses 

Apply tuning for the PCH I2C buses on Eve based on rise/fall time
measurements that were done with a scope.

BUG=chrome-os-partner:59686
BRANCH=none
TEST=Manual testing on Eve P1 to verify that all devices on I2C
buses are still functional.  Post-tuning measurement will be done
once a new firmware is released.

Change-Id: I3d70ff455a20ecda374d7e7fa6cd3ab15e7f2621
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18487
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Duncan Laurie 2017-02-24 12:28:12 -08:00
parent 6a489237d5
commit d4d6ba180d
1 changed files with 24 additions and 4 deletions
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28
src/mainboard/google/eve/devicetree.cb
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@ -162,12 +162,16 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Empty
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # Touchscreen
register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # TPM
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # Touchpad
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # Audio
# Touchscreen
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
register "i2c[0]" = "{
.speed = I2C_SPEED_FAST_PLUS,
.rise_time_ns = 17,
.fall_time_ns = 38,
}"
# Enable I2C1 bus early for TPM access
register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
register "i2c[1]" = "{
.early_init = 1,
.speed = I2C_SPEED_FAST,
@ -175,6 +179,22 @@ chip soc/intel/skylake
.fall_time_ns = 32,
}"
# Touchpad
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,
.rise_time_ns = 247,
.fall_time_ns = 17,
}"
# Audio
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
register "i2c[4]" = "{
.speed = I2C_SPEED_FAST,
.rise_time_ns = 240,
.fall_time_ns = 30,
}"
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,