soc/amd/sabrina,vc/amd/fsp/sabrina: Add UART support for Sabrina

Sabrina previously didn't support UART mapping in psp verstage.  Now that it has been enabled, add the relevant uart code here.

BUG=b:218709292
TEST=Set serial soft fuse, boot to kernel, check logs

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I591fa69b6e722929839babfff62e9d56c68e1112
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65532
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/sabrina/psp_verstage/uart.c

@@ -4,8 +4,23 @@
 #include <amdblocks/uart.h>
 #include <types.h>
 
+static void *uart_bars[FCH_UART_ID_MAX];
+
 uintptr_t get_uart_base(unsigned int idx)
 {
-	/* Mapping the UART is not supported. */
-	return 0;
+	uint32_t err;
+
+	if (idx >= ARRAY_SIZE(uart_bars))
+		return 0;
+
+	if (uart_bars[idx])
+		return (uintptr_t)uart_bars[idx];
+
+	err = svc_map_fch_dev(FCH_IO_DEVICE_UART, idx, 0, &uart_bars[idx]);
+	if (err) {
+		svc_debug_print("Failed to map UART\n");
+		return 0;
+	}
+
+	return (uintptr_t)uart_bars[idx];
 }

src/vendorcode/amd/fsp/sabrina/include/bl_uapp/bl_syscall_public.h

@@ -91,9 +91,16 @@ enum fch_io_device {
 	FCH_IO_DEVICE_MISC,
 	FCH_IO_DEVICE_AOAC,
 	FCH_IO_DEVICE_IOPORT,
+	FCH_IO_DEVICE_UART,
 	FCH_IO_DEVICE_END,
 };
 
+enum fch_uart_id {
+	FCH_UART_ID_0 = 0,
+	FCH_UART_ID_1 = 1,
+	FCH_UART_ID_MAX,
+};
+
 enum fch_i2c_controller_id {
 	FCH_I2C_CONTROLLER_ID_0 = 0,
 	FCH_I2C_CONTROLLER_ID_1 = 1,