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soc/intel: Move top_swap Kconfig symbols into soc/intel/common 

Move the Intel top_swap feature into the intel/common Kconfig file.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I3ed649aaeb51c2250be9473114c17d3f191d2c38
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Martin Roth 2022-06-22 21:11:59 -06:00 committed by Martin L Roth
parent 7e48686535
commit d51141e630
2 changed files with 38 additions and 36 deletions
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36
src/soc/intel/Kconfig
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@ -1,36 +0,0 @@
# should all probably be moved to soc/intel/common/Kconfig
config INTEL_HAS_TOP_SWAP
bool
help
Set this config if the Intel SoC supports top swap feature
config INTEL_ADD_TOP_SWAP_BOOTBLOCK
bool "Include a Top swap bootblock"
default n
depends on INTEL_HAS_TOP_SWAP
help
Intel PCH/Southbridges have feature that it is possible to have
the southbridge/PCH look for the bootblock at a 64K or
128K/256K/512K/1MB (in case of newer SoCs) offset
instead of the usual top of flash.
Select this to put a 'second' bootblock.
config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
hex "Size of top swap boot block"
depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
default 0x10000
help
Set this config to a supported topswap size.
Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000
config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG
string
depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
help
Use this config to specify the name of a FMAP region (which should
hold a microcode) whose address as the first entry in the topswap FIT.
This is useful in creating a asymmetric FIT in top swap bootblock
than the one in non-topswap bootblock. This string will be passed
onto ifittool (-A -n option). ifittool will not parse the region for MCU
entries, and only locate the region and insert its address into FIT.

38
src/soc/intel/common/Kconfig.common
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@ -1,3 +1,41 @@
config INTEL_HAS_TOP_SWAP
bool
help
Set this config if the Intel SoC supports top swap feature
if INTEL_HAS_TOP_SWAP
config INTEL_ADD_TOP_SWAP_BOOTBLOCK
bool "Include a Top swap bootblock"
default n
help
Intel PCH/Southbridges have feature that it is possible to have
the southbridge/PCH look for the bootblock at a 64K or
128K/256K/512K/1MB (in case of newer SoCs) offset
instead of the usual top of flash.
Select this to put a 'second' bootblock.
config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
hex "Size of top swap boot block"
depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
default 0x10000
help
Set this config to a supported topswap size.
Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000
config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG
string
depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
help
Use this config to specify the name of a FMAP region (which should
hold a microcode) whose address as the first entry in the topswap FIT.
This is useful in creating a asymmetric FIT in top swap bootblock
than the one in non-topswap bootblock. This string will be passed
onto ifittool (-A -n option). ifittool will not parse the region for MCU
entries, and only locate the region and insert its address into FIT.
endif
config SOC_INTEL_COMMON
bool
select AZALIA_PLUGIN_SUPPORT