soc/intel/quark: Disable FSP serial output

Disable FSP output when CONFIG_DEFAULT_CONSOLE_LOGLEVEL is not set to 8
(BIOS_SPEW).  Use the console log level to choose between the serial
port address and NULL and pass it to FSP for the serial port address.

TEST=Build and run on Galileo Gen2.

Change-Id: I5498aad218524c211082d85d0ae9aacaf08a80f6
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16005
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Lee Leahy 2016-07-31 13:40:15 -07:00
parent f26fc0f28b
commit d52636113a
2 changed files with 4 additions and 2 deletions

View File

@ -120,7 +120,8 @@ void soc_memory_init_params(struct romstage_params *params,
upd->RankMask = config->RankMask;
upd->RmuBaseAddress = (uintptr_t)rmu_file;
upd->RmuLength = rmu_file_len;
upd->SerialPortBaseAddress = UART_BASE_ADDRESS;
upd->SerialPortBaseAddress = console_log_level(BIOS_SPEW)
? UART_BASE_ADDRESS : 0;
upd->SmmTsegSize = IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) ?
config->SmmTsegSize : 0;
upd->SocRdOdtVal = config->SocRdOdtVal;

View File

@ -161,7 +161,8 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *fspm_upd)
upd->RankMask = config->RankMask;
upd->RmuBaseAddress = (uintptr_t)rmu_file;
upd->RmuLength = rmu_file_len;
upd->SerialPortBaseAddress = UART_BASE_ADDRESS;
upd->SerialPortBaseAddress = console_log_level(BIOS_SPEW)
? UART_BASE_ADDRESS : 0;
upd->SmmTsegSize = IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) ?
config->SmmTsegSize : 0;
upd->SocRdOdtVal = config->SocRdOdtVal;