From d52bfbb6aa822b8d5137bedef638a5214a07e4da Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 7 Nov 2022 09:23:02 +0100 Subject: [PATCH] cpu/intel/sandybridge: Use enum for ACPI C states MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also remove the now unnecessary comments from the devicetree. Change-Id: Iebbe12fd413b7a2eb1078a579e194eba821ada7c Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/69292 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/cpu/intel/model_206ax/chip.h | 17 ++++++++++++++--- src/mainboard/intel/emeraldlake2/devicetree.cb | 4 ++-- src/mainboard/kontron/ktqm77/devicetree.cb | 4 ++-- .../roda/rv11/variants/rv11/devicetree.cb | 4 ++-- .../roda/rv11/variants/rw11/devicetree.cb | 4 ++-- src/mainboard/samsung/stumpy/devicetree.cb | 4 ++-- src/northbridge/intel/sandybridge/chipset.cb | 6 +++--- 7 files changed, 27 insertions(+), 16 deletions(-) diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h index 4fff04a705..a46c7bf154 100644 --- a/src/cpu/intel/model_206ax/chip.h +++ b/src/cpu/intel/model_206ax/chip.h @@ -3,10 +3,21 @@ /* Magic value used to locate this chip in the device tree */ #define SPEEDSTEP_APIC_MAGIC 0xACAC +/* Keep this in sync with acpi.c */ +enum cpu_acpi_level { + CPU_ACPI_DISABLED = 0, + CPU_ACPI_C1, + CPU_ACPI_C2, + CPU_ACPI_C3, + CPU_ACPI_C6, + CPU_ACPI_C7, + CPU_ACPI_C7S, +}; + struct cpu_intel_model_206ax_config { - int acpi_c1; /* ACPI C1 */ - int acpi_c2; /* ACPI C2 */ - int acpi_c3; /* ACPI C3 */ + enum cpu_acpi_level acpi_c1; + enum cpu_acpi_level acpi_c2; + enum cpu_acpi_level acpi_c3; int tcc_offset; /* TCC Activation Offset */ }; diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb index 9255848b2a..fef8992cd4 100644 --- a/src/mainboard/intel/emeraldlake2/devicetree.cb +++ b/src/mainboard/intel/emeraldlake2/devicetree.cb @@ -17,8 +17,8 @@ chip northbridge/intel/sandybridge device lapic 0 on end device lapic 0xacac off end - register "acpi_c1" = "3" # ACPI(C1) = MWAIT(C3) - register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6) + register "acpi_c1" = "CPU_ACPI_C3" + register "acpi_c2" = "CPU_ACPI_C6" end end diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb index 1bbbbfc32d..a72b94f9f5 100644 --- a/src/mainboard/kontron/ktqm77/devicetree.cb +++ b/src/mainboard/kontron/ktqm77/devicetree.cb @@ -8,8 +8,8 @@ chip northbridge/intel/sandybridge device lapic 0 on end device lapic 0xacac off end - register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C3) - register "acpi_c3" = "0" # ACPI(C3) = MWAIT(C7) + register "acpi_c2" = "CPU_ACPI_C6" + register "acpi_c3" = "CPU_ACPI_DISABLED" end end diff --git a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb index 7cb6812695..2e5ee0ff9a 100644 --- a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb @@ -23,8 +23,8 @@ chip northbridge/intel/sandybridge device lapic 0 on end device lapic 0xacac off end - register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6) - register "acpi_c3" = "0" + register "acpi_c2" = "CPU_ACPI_C6" + register "acpi_c3" = "CPU_ACPI_DISABLED" end end diff --git a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb index 96a8ce848c..20b1c9a989 100644 --- a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb @@ -23,8 +23,8 @@ chip northbridge/intel/sandybridge device lapic 0 on end device lapic 0xacac off end - register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6) - register "acpi_c3" = "0" + register "acpi_c2" = "CPU_ACPI_C6" + register "acpi_c3" = "CPU_ACPI_DISABLED" end end diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index ea164c480d..cd7b907d63 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -17,8 +17,8 @@ chip northbridge/intel/sandybridge device lapic 0 on end device lapic 0xacac off end - register "acpi_c1" = "3" # ACPI(C1) = MWAIT(C3) - register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6) + register "acpi_c1" = "CPU_ACPI_C3" + register "acpi_c2" = "CPU_ACPI_C6" end end diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb index e7ade1977e..16fab6d17a 100644 --- a/src/northbridge/intel/sandybridge/chipset.cb +++ b/src/northbridge/intel/sandybridge/chipset.cb @@ -8,9 +8,9 @@ chip northbridge/intel/sandybridge device lapic 0 on end device lapic 0xacac off end - register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1) - register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3) - register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7) + register "acpi_c1" = "CPU_ACPI_C1" + register "acpi_c2" = "CPU_ACPI_C3" + register "acpi_c3" = "CPU_ACPI_C7" end end