mb/google/octopus: Drop I2C bus 0 clock frequency for Phaser

Need to tune I2C bus 0 clock frequency under the 400KHz 
since this bus attached the Stylus EMR pen and need meet the spec.

Bug=b:117297214
TEST=flash coreboot to the DUT and measure I2C bus 0 clock
frequency whether under 400KHz

Change-Id: I06d9d25f52d7f641d937de0d6b7df3d7a076fbf9
Signed-off-by: Peichao.Wang <peichao.wang@bitland.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/28973
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
peichao.wang 2018-10-09 12:18:31 +08:00 committed by Aaron Durbin
parent 4b6f262ead
commit d5325ddcc2
1 changed files with 2 additions and 2 deletions

View File

@ -20,8 +20,8 @@ chip soc/intel/apollolake
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 152,
.fall_time_ns = 30,
.rise_time_ns = 66,
.fall_time_ns = 90,
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,