Replace #ifdefs for sc520 systems by run time probing.
fixes #109 Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -11,7 +11,7 @@ STRIP = strip
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INSTALL = /usr/bin/install
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PREFIX = /usr/local
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#CFLAGS = -O2 -g -Wall -Werror
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CFLAGS = -Os -Wall -Werror # -DTS5300
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CFLAGS = -Os -Wall -Werror
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OS_ARCH = $(shell uname)
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ifeq ($(OS_ARCH), SunOS)
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LDFLAGS = -lpci -lz
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@ -35,6 +35,8 @@
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#include <unistd.h>
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#include "flash.h"
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unsigned long flashbase = 0;
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/**
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* flashrom defaults to LPC flash devices. If a known SPI controller is found
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* and the SPI strappings are set, this will be overwritten by the probing code.
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@ -797,6 +799,59 @@ static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
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return 0;
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}
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/**
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* Usually on the x86 architectures (and on other PC-like platforms like some
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* Alphas or Itanium) the system flash is mapped right below 4G. On the AMD
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* Elan SC520 only a small piece of the system flash is mapped there, but the
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* complete flash is mapped somewhere below 1G. The position can be determined
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* by the BOOTCS PAR register.
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*/
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static int get_flashbase_sc520(struct pci_dev *dev, const char *name)
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{
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int i, bootcs_found = 0;
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uint32_t parx = 0;
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void *mmcr;
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/* 1. Map MMCR */
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mmcr = mmap(0, getpagesize(), PROT_WRITE | PROT_READ,
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MAP_SHARED, fd_mem, (off_t)0xFFFEF000);
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if (mmcr == MAP_FAILED) {
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perror("Can't mmap Elan SC520 specific registers using " MEM_DEV);
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exit(1);
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}
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/* 2. Scan PAR0 (0x88) - PAR15 (0xc4) for
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* BOOTCS region (PARx[31:29] = 100b)e
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*/
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for (i = 0x88; i <= 0xc4; i += 4) {
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parx = *(volatile uint32_t *)(mmcr + i);
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if ((parx >> 29) == 4) {
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bootcs_found = 1;
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break; /* BOOTCS found */
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}
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}
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/* 3. PARx[25] = 1b --> flashbase[29:16] = PARx[13:0]
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* PARx[25] = 0b --> flashbase[29:12] = PARx[17:0]
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*/
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if (bootcs_found) {
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if (parx & (1 << 25)) {
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parx &= (1 << 14) - 1; /* Mask [13:0] */
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flashbase = parx << 16;
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} else {
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parx &= (1 << 18) - 1; /* Mask [17:0] */
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flashbase = parx << 12;
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}
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} else {
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printf("AMD Elan SC520 detected, but no BOOTCS. Assuming flash at 4G\n");
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}
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/* 4. Clean up */
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munmap (mmcr, getpagesize());
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return 0;
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}
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typedef struct penable {
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uint16_t vendor, device;
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const char *name;
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@ -875,6 +930,7 @@ static const FLASH_ENABLE enables[] = {
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{0x10de, 0x0548, "NVIDIA MCP67", enable_flash_mcp55},
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{0x1002, 0x4377, "ATI SB400", enable_flash_sb400},
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{0x1166, 0x0205, "Broadcom HT-1000", enable_flash_ht1000},
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{0x1022, 0x3000, "AMD Elan SC520", get_flashbase_sc520},
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};
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void print_supported_chipsets(void)
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@ -410,6 +410,8 @@ void print_supported_boards(void);
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int chipset_flash_enable(void);
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void print_supported_chipsets(void);
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extern unsigned long flashbase;
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typedef enum {
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BUS_TYPE_LPC,
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BUS_TYPE_ICH7_SPI,
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@ -105,7 +105,7 @@ struct flashchip *probe_flash(struct flashchip *first_flash, int force)
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{
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volatile uint8_t *bios;
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struct flashchip *flash;
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unsigned long flash_baseaddr = 0, size;
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unsigned long size;
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for (flash = first_flash; flash && flash->name; flash++) {
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if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0)
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@ -133,16 +133,11 @@ struct flashchip *probe_flash(struct flashchip *first_flash, int force)
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*/
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size = getpagesize();
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}
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#ifdef TS5300
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// FIXME: Wrong place for this decision
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// FIXME: This should be autodetected. It is trivial.
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flash_baseaddr = 0x9400000;
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#else
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flash_baseaddr = (0xffffffff - size + 1);
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#endif
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if (!flashbase)
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flashbase = (0xffffffff - size + 1);
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bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
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fd_mem, (off_t) flash_baseaddr);
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fd_mem, (off_t) flashbase);
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if (bios == MAP_FAILED) {
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perror("Can't mmap memory using " MEM_DEV);
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exit(1);
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@ -167,7 +162,7 @@ notfound:
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return NULL;
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printf("Found chip \"%s %s\" (%d KB) at physical address 0x%lx.\n",
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flash->vendor, flash->name, flash->total_size, flash_baseaddr);
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flash->vendor, flash->name, flash->total_size, flashbase);
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return flash;
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}
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