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util/intelp2m/fsp: Fix wrong register decoding for direction and interrupt 

Using the wrong registers to build the fields led to incorrect
GPIO direction and interrupt trigger values. Change the calls
to fix the tables.

Change-Id: Icbeeb1fec6a863d0f86659c21924e15ae6765d47
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54973
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Benjamin Doron 2021-06-09 20:08:10 +00:00 committed by Michael Niewöhner
parent 06b2049ab6
commit d593bf7dfe
1 changed files with 2 additions and 2 deletions
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4
util/intelp2m/fields/fsp/fsp.go
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@ -74,7 +74,7 @@ func (FieldMacros) DecodeDW0() {
1 << 4 | 0: "GpioDirInInvOut",
1 << 4 | 1: "GpioDirInInv",
},
value : dw0.GetRxInvert() << 4 | dw0.GetRXLevelEdgeConfiguration(),
value : dw0.GetRxInvert() << 4 | dw0.GetGPIORxTxDisableStatus(),
},
&field {
@ -116,7 +116,7 @@ func (FieldMacros) DecodeDW0() {
2: "GpioIntLvlEdgDis",
3: "GpioIntBothEdge",
},
value : dw0.GetResetConfig(),
value : dw0.GetRXLevelEdgeConfiguration(),
},
&field {