mainboard/hatch: Fix GPE wake comments

The indirection of names is exceedingly confusing for ultimately the single
interrupt trace of EC_PCH_WAKE_ODL between the EC gpio#74 to GPD2/LAN_WAKE# on
the PCH side.

This helps folks chase this indirection down through the code.

BUG=b:147026979
BRANCH=none
TEST=builds

Change-Id: I35d746a202dae06d2f6f1edfaa3889864b09f50d
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/mainboard/google/hatch/variants/baseboard/gpio.c

@@ -377,7 +377,7 @@ static const struct pad_config gpio_table[] = {
 	/* H23 : GPP_H23_STRAP */
 	PAD_NC(GPP_H23, NONE),
 
-	/* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_OD */
+	/* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_ODL */
 	PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
 
 	/* SD card detect VGPIO */

src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h

@@ -22,7 +22,7 @@
 
 #define GPIO_PCH_WP	        GPP_C20
 
-/* EC wake pin is LAN_WAKE# */
+/* EC wake pin is routed to GPD2/LAN_WAKE# on PCH */
 #define GPE_EC_WAKE		GPE0_LAN_WAK
 
 /* eSPI virtual wire reporting */

src/mainboard/google/hatch/variants/puff/include/variant/ec.h

@@ -54,7 +54,12 @@
 /* Enable EC backed PD MCU device in ACPI */
 #define EC_ENABLE_PD_MCU_DEVICE
 
-/* Provide wake pin for EC for _PRW WoL method */
+/**
+ * Defines EC wake pin route.
+ * Note that GPE_EC_WAKE is defined, confusingly, as
+ * GPE_LAN_WAK which is GPD2/LAN_WAKE# on the PCH or
+ * as the line EC_PCH_WAKE_ODL on the schematic.
+ */
 #define EC_ENABLE_WAKE_PIN	GPE_EC_WAKE
 
 #define SIO_EC_MEMMAP_ENABLE	/* EC Memory Map Resources */