soc/amd/cezanne/graphics: add VBIOS ID remapping for Barcelo

Barcelo uses the same VBIOS image as Cezanne, but uses a different PCI
ID, so we need to implement map_oprom_vendev for the SoC.

BUG=b:193888172

Change-Id: I2eed43705f497245bd953659844b3fb461aa0b3b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56392
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-07-16 20:51:08 +02:00
parent 81d367feee
commit d5b51beb79
3 changed files with 23 additions and 1 deletions

View File

@ -33,7 +33,6 @@ romstage-y += uart.c
ramstage-y += i2c.c
ramstage-y += acpi.c
ramstage-y += cppc.c
ramstage-y += agesa_acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
@ -41,6 +40,7 @@ ramstage-y += data_fabric.c
ramstage-y += fch.c
ramstage-y += fsp_s_params.c
ramstage-y += gpio.c
ramstage-y += graphics.c
ramstage-y += mca.c
ramstage-y += reset.c
ramstage-y += root_complex.c

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@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/pci_rom.h>
#include <soc/cpu.h>
#include <stdint.h>
u32 map_oprom_vendev(u32 vendev)
{
u32 new_vendev = vendev;
switch (vendev) {
case CEZANNE_VBIOS_VID_DID:
case BARCELO_VBIOS_VID_DID:
new_vendev = CEZANNE_VBIOS_VID_DID;
break;
}
return new_vendev;
}

View File

@ -5,4 +5,7 @@
#define CEZANNE_A0_CPUID 0x00a50f00
#define CEZANNE_VBIOS_VID_DID 0x10021638
#define BARCELO_VBIOS_VID_DID 0x100215e7
#endif /* AMD_CEZANNE_CPU_H */