mb/google/guybrush: Configure eSPI GPIOs in early stage
BUG=b:181961514, b:180721208 TEST=builds Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I0d22de977f09cbf46b28243d9f0c1e9a36e1398f Reviewed-on: https://review.coreboot.org/c/coreboot/+/51295 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Justin Frodsham <justin.frodsham@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -108,16 +108,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
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/* CLK_REQ0_L */
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PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE),
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/* GPIO_93 - GPIO_103: Not available */
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/* ESPI1_DATA0 */
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PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE),
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/* ESPI1_DATA1 */
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PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE),
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/* ESPI1_DATA2 */
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PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE),
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/* ESPI1_DATA3 */
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PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
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/* ESPI_ALERT_L */
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PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
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/* GPIO_104 - GPIO_108: eSPI configured in early stage */
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/* RAM_ID_0 / DEV_BEEP_EN */
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PAD_GPI(GPIO_109, PULL_NONE),
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/* GPIO_110 - GPIO_112: Not available */
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@ -165,7 +156,16 @@ static const struct soc_amd_gpio base_gpio_table[] = {
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/* Early GPIO configuration */
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static const struct soc_amd_gpio early_gpio_table[] = {
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/* TODO: Fill early gpio configuration */
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/* ESPI1_DATA0 */
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PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE),
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/* ESPI1_DATA1 */
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PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE),
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/* ESPI1_DATA2 */
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PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE),
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/* ESPI1_DATA3 */
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PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
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/* ESPI_ALERT_L */
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PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
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};
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/* GPIO configuration for sleep */
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