diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index 2e5fae58e5..f703a0f7de 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <amdblocks/spi.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -164,6 +165,13 @@ static void soc_init(void *chip_info)
 
 	fsp_silicon_init(acpi_is_wakeup_s3());
 
+	/*
+	 * TODO(furquan): Get rid of this once FSP is fixed to not touch SPI
+	 * registers(b/153506142). Currently, FSP-S reconfigures SPI frequency causing em100 to
+	 * stop working. Thus, reconfigure SPI speeds here.
+	 */
+	fch_spi_config_modes();
+
 	data_fabric_set_mmio_np();
 	southbridge_init(chip_info);
 }