From d62f3aa69d01478d3a898d3a1483e414fe41ef37 Mon Sep 17 00:00:00 2001
From: Felix Singer <felixsinger@posteo.net>
Date: Sun, 2 Jan 2022 02:16:23 +0100
Subject: [PATCH] soc/intel/cannonlake/acpi: Replace LGreaterEqual(a,b) with
 ASL 2.0 syntax

Replace `LGreaterEqual(a, b)` with `a >= b`.

Change-Id: Ic9836acb4d32f2ce30c3c6d488bc22ddc64bf365
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60688
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
---
 src/soc/intel/cannonlake/acpi/gpio.asl       | 10 +++++-----
 src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl |  8 ++++----
 src/soc/intel/cannonlake/acpi/scs.asl        |  4 ++--
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl
index 265bcfb953..d16c67a0a6 100644
--- a/src/soc/intel/cannonlake/acpi/gpio.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio.asl
@@ -61,31 +61,31 @@ Device (GPIO)
 Method (GADD, 1, NotSerialized)
 {
 	/* GPIO Community 0 */
-	If (LGreaterEqual (Arg0, GPP_A0) && LLessEqual (Arg0, SPI0_CLK_LOOPBK))
+	If (Arg0 >= GPP_A0 && LLessEqual (Arg0, SPI0_CLK_LOOPBK))
 	{
 		Store (PID_GPIOCOM0, Local0)
 		Local1 = Arg0 - GPP_A0
 	}
 	/* GPIO Community 1 */
-	If (LGreaterEqual (Arg0, GPP_D0) && LLessEqual (Arg0, vSD3_CD_B))
+	If (Arg0 >= GPP_D0 && LLessEqual (Arg0, vSD3_CD_B))
 	{
 		Store (PID_GPIOCOM1, Local0)
 		Local1 = Arg0 - GPP_D0
 	}
 	/* GPIO Community 2 */
-	If (LGreaterEqual (Arg0, GPD0) && LLessEqual (Arg0, DRAM_RESET_B))
+	If (Arg0 >= GPD0 && LLessEqual (Arg0, DRAM_RESET_B))
 	{
 		Store (PID_GPIOCOM2, Local0)
 		Local1 = Arg0 - GPD0
 	}
 	/* GPIO Community 3 */
-	If (LGreaterEqual (Arg0, HDA_BCLK) && LLessEqual (Arg0, TRIGGER_OUT))
+	If (Arg0 >= HDA_BCLK && LLessEqual (Arg0, TRIGGER_OUT))
 	{
 		Store (PID_GPIOCOM3, Local0)
 		Local1 = Arg0 - HDA_BCLK
 	}
 	/* GPIO Community 4*/
-	If (LGreaterEqual (Arg0, GPP_C0) && LLessEqual (Arg0, CL_RST_B))
+	If (Arg0 >= GPP_C0 && LLessEqual (Arg0, CL_RST_B))
 	{
 		Store (PID_GPIOCOM4, Local0)
 		Local1 = Arg0 - GPP_C0
diff --git a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl
index f60fd5618a..495069dd72 100644
--- a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl
@@ -67,25 +67,25 @@ Device (GPIO)
 Method (GADD, 1, NotSerialized)
 {
 	/* GPIO Community 0 */
-	If (LGreaterEqual (Arg0, GPP_A0) && LLessEqual (Arg0, GSPI1_CLK_LOOPBK))
+	If (Arg0 >= GPP_A0 && LLessEqual (Arg0, GSPI1_CLK_LOOPBK))
 	{
 		Store (PID_GPIOCOM0, Local0)
 		Local1 = Arg0 - GPP_A0
 	}
 	/* GPIO Community 1 */
-	If (LGreaterEqual (Arg0, GPP_C0) && LLessEqual (Arg0, vSSP2_RXD))
+	If (Arg0 >= GPP_C0 && LLessEqual (Arg0, vSSP2_RXD))
 	{
 		Store (PID_GPIOCOM1, Local0)
 		Local1 = Arg0 - GPP_C0
 	}
 	/* GPIO Community 3*/
-	If (LGreaterEqual (Arg0, GPP_K0) && LLessEqual (Arg0, SPI0_CLK_LOOPBK))
+	If (Arg0 >= GPP_K0 && LLessEqual (Arg0, SPI0_CLK_LOOPBK))
 	{
 		Store (PID_GPIOCOM3, Local0)
 		Local1 = Arg0 - GPP_K0
 	}
 	/* GPIO Community 4*/
-	If (LGreaterEqual (Arg0, HDACPU_SDI) && LLessEqual (Arg0, GPP_J11))
+	If (Arg0 >= HDACPU_SDI && LLessEqual (Arg0, GPP_J11))
 	{
 		Store (PID_GPIOCOM4, Local0)
 		Local1 = Arg0 - GPP_I0
diff --git a/src/soc/intel/cannonlake/acpi/scs.asl b/src/soc/intel/cannonlake/acpi/scs.asl
index 4c01b48282..81f3d18552 100644
--- a/src/soc/intel/cannonlake/acpi/scs.asl
+++ b/src/soc/intel/cannonlake/acpi/scs.asl
@@ -75,7 +75,7 @@ Scope (\_SB.PCI0) {
 		{
 			If (Arg0 == ^DSUU) {
 				/* Check the revision */
-				If (LGreaterEqual (Arg1, Zero)) {
+				If (Arg1 >= 0) {
 					/*
 					 * Function Index 0 the return value is a buffer
 					 * containing one bit for each function index, starting
@@ -148,7 +148,7 @@ Scope (\_SB.PCI0) {
 		{
 			If (Arg0 == ^DSUU) {
 				/* Check the revision */
-				If (LGreaterEqual (Arg1, Zero)) {
+				If (Arg1 >= 0) {
 					/*
 					 * Function Index 0 the return value is a buffer containing
 					 * one bit for each function index, starting with zero.