armv7: Reserve space BL1 and checksum header by specifying bootblock offset.
Not all ARM systems need "BL1", and the layout of BL* and bootblock may be different (ex, Exynos 5250 may use a new BL1 with variable length checksum header). To support that better, define the real base address (and ROM offset) of boot block, and then we can post-processing ROM image file by filling data / checksum and any other information. Change-Id: I0e3105e52500b6b457371ad33a9aa546acf28928 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3664 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -48,7 +48,8 @@ prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
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# TODO Change -b to Kconfig variable.
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$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
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$(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
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-B $(objcbfs)/bootblock.bin -a 64 -b 0x0000 \
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-B $(objcbfs)/bootblock.bin -a 64 \
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-b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \
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-H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \
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-o $(CONFIG_CBFS_ROM_OFFSET)
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@printf " CBFS $(subst $(obj)/,,$(@))\n"
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@ -29,14 +29,6 @@
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* MA 02111-1307 USA
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*/
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.section ".bl1", "a", %progbits
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_bl1:
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/* For now we have to live with a first stage boot loader
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* on ARM, which is 8KB in size and it is prepended to the
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* reset vector
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*/
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.skip (CONFIG_BL1_SIZE_KB * 1024)
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.section ".start", "a", %progbits
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.globl _start
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_start: b reset
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@ -25,12 +25,11 @@ OUTPUT_ARCH(arm)
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TARGET(binary)
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SECTIONS
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{
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ROMLOC = CONFIG_BOOTBLOCK_BASE - (CONFIG_BL1_SIZE_KB * 1024);
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ROMLOC = CONFIG_BOOTBLOCK_BASE;
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/* This section might be better named .setup */
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.rom ROMLOC : {
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_rom = .;
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*(.bl1);
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*(.start);
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*(.id);
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*(.text);
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@ -10,9 +10,26 @@ config EXYNOS_ACE_SHA
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bool
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default n
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config BL1_SIZE_KB
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int
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default 8
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# ROM image layout.
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#
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# 0x0000: vendor-provided BL1 (8k).
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# 0x2000: bootblock
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# 0x2010-0x2090: reserved for CBFS master header.
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# 0xA000: Free for CBFS data.
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config BOOTBLOCK_ROM_OFFSET
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hex
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default 0x2000
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config CBFS_HEADER_ROM_OFFSET
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hex "offset of master CBFS header in ROM"
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default 0x2010
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config CBFS_ROM_OFFSET
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# Calculated by BOOTBLOCK_ROM_OFFSET + max bootblock size.
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hex "offset of CBFS data in ROM"
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default 0x0A000
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# Example SRAM/iRAM map for Exynos5250 platform:
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#
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@ -50,17 +67,6 @@ config STACK_SIZE
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hex
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default 0x1000
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config CBFS_ROM_OFFSET
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# Calculated by BL1 + max bootblock size.
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hex "offset of CBFS data in ROM"
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default 0x0A000
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# TODO Change this to some better address not overlapping bootblock when
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# cbfstool supports creating header in arbitrary location.
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config CBFS_HEADER_ROM_OFFSET
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hex "offset of master CBFS header in ROM"
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default 0x2040
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# TODO We may probably move this to board-specific implementation files instead
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# of KConfig values.
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config CBFS_CACHE_ADDRESS
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@ -10,20 +10,39 @@ config EXYNOS_ACE_SHA
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bool
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default n
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config BL1_SIZE_KB
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int
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default 8
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# ROM image layout.
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#
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# 0x0000: vendor-provided BL1 (8k).
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# 0x2000: variable length bootblock checksum header
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# 0x2010: bootblock
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# 0x2020-0x20A0: reserved for CBFS master header.
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# 0xA000: Free for CBFS data.
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config BOOTBLOCK_ROM_OFFSET
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hex
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default 0x2010
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config CBFS_HEADER_ROM_OFFSET
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hex "offset of master CBFS header in ROM"
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default 0x2020
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config CBFS_ROM_OFFSET
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# Calculated by BOOTBLOCK_ROM_OFFSET + max bootblock size.
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hex "offset of CBFS data in ROM"
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default 0x0A000
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# Example SRAM/iRAM map for Exynos5420 platform:
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#
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# 0x0202_0000: vendor-provided BL1
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# 0x0202_4400: bootblock, assume up to 32KB in size
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# 0x0202_4400: variable length bootblock checksum header.
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# 0x0202_4410: bootblock, assume up to 32KB in size
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# 0x0203_0000: romstage, assume up to 128KB in size.
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# 0x0207_4000: stack pointer
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config BOOTBLOCK_BASE
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hex
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default 0x02024400
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default 0x02024410
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config ROMSTAGE_BASE
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hex
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@ -50,17 +69,6 @@ config STACK_SIZE
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hex
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default 0x1000
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config CBFS_ROM_OFFSET
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# Calculated by BL1 + max bootblock size.
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hex "offset of CBFS data in ROM"
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default 0x0A000
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# TODO Change this to some better address not overlapping bootblock when
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# cbfstool supports creating header in arbitrary location.
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config CBFS_HEADER_ROM_OFFSET
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hex "offset of master CBFS header in ROM"
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default 0x2040
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# TODO We may probably move this to board-specific implementation files instead
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# of KConfig values.
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config CBFS_CACHE_ADDRESS
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@ -81,6 +81,10 @@ config ROMSTAGE_SIZE
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hex
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default 0x20000
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config BOOTBLOCK_ROM_OFFSET
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hex
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default 0x0
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config CBFS_HEADER_ROM_OFFSET
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hex
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default 0x0100000
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@ -54,6 +54,18 @@ config NR_DRAM_BANKS
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int
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default 1
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config BOOTBLOCK_ROM_OFFSET
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hex
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default 0x0
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config CBFS_HEADER_ROM_OFFSET
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hex
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default 0x10
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config CBFS_ROM_OFFSET
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hex
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default 0x5000
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choice CONSOLE_SERIAL_UART_CHOICES
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prompt "Serial Console UART"
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default CONSOLE_SERIAL_UART0
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