mainboard/google/kahlee: Enable EC wake on GPIO24
The grunt EC uses GPIO24 (EC_PCH_WAKE_L) to signal wake-up events to the AP. On Stoney, GPIO24 maps to GEVENT (GPE) 15. The kahlee EC uses GPIO2 (EC_PCH_WAKE_L) to signal wake-up events to the AP. On Stoney, GPIO2 maps to GEVENT (GPE) 8. BUG=b:78461678 TEST=powerd_dbus_suspend, tap any key on keyboard wakes from S3. TEST=sign in, EC: lidclose, EC: lidopen => system wakes from S3. Change-Id: Ib1809740837e686992ff70b81933159a5dff7595 Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/25816 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@ -20,6 +20,7 @@
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <boardid.h>
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#include <boardid.h>
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#include <variant/gpio.h>
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/*
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/*
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* As a rule of thumb, GPIO pins used by coreboot should be initialized at
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* As a rule of thumb, GPIO pins used by coreboot should be initialized at
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@ -498,6 +499,14 @@ static const struct sci_source gpe_table[] = {
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.level = SMI_SCI_EDG,
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.level = SMI_SCI_EDG,
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},
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},
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/* EC_PCH_WAKE_L */
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{
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.scimap = EC_WAKE_GPI,
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.gpe = EC_WAKE_GPI,
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.direction = SMI_SCI_LVL_LOW,
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.level = SMI_SCI_EDG,
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},
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/* H1_PCH_INT_ODL */
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/* H1_PCH_INT_ODL */
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{
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{
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.scimap = 22,
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.scimap = 22,
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@ -58,6 +58,7 @@
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/* Enable LID switch */
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/* Enable LID switch */
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#define EC_ENABLE_LID_SWITCH
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#define EC_ENABLE_LID_SWITCH
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#define EC_ENABLE_WAKE_PIN EC_WAKE_GPI
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/* Enable EC backed ALS device in ACPI */
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/* Enable EC backed ALS device in ACPI */
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#define EC_ENABLE_ALS_DEVICE
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#define EC_ENABLE_ALS_DEVICE
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@ -42,5 +42,6 @@
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/* These define the GPE, not the GPIO. */
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/* These define the GPE, not the GPIO. */
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#define EC_SCI_GPI 3 /* AGPIO 22 -> GPE 3 */
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#define EC_SCI_GPI 3 /* AGPIO 22 -> GPE 3 */
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#define EC_SMI_GPI 10 /* AGPIO 6 -> GPE 10 */
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#define EC_SMI_GPI 10 /* AGPIO 6 -> GPE 10 */
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#define EC_WAKE_GPI 15 /* AGPIO 24 -> GPE 15 */
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#endif /* __BASEBOARD_GPIO_H__ */
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#endif /* __BASEBOARD_GPIO_H__ */
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@ -46,5 +46,6 @@
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/* These define the GPE, not the GPIO. */
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/* These define the GPE, not the GPIO. */
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#define EC_SCI_GPI 3 /* AGPIO 22 -> GPE 3 */
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#define EC_SCI_GPI 3 /* AGPIO 22 -> GPE 3 */
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#define EC_SMI_GPI 10 /* AGPIO 6 -> GPE 10 */
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#define EC_SMI_GPI 10 /* AGPIO 6 -> GPE 10 */
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#define EC_WAKE_GPI 8 /* AGPIO 2 -> GPE 8 */
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#endif /* __VARIANT_GPIO_H__ */
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#endif /* __VARIANT_GPIO_H__ */
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